]> asedeno.scripts.mit.edu Git - linux.git/blobdiff - arch/arm/boot/dts/am335x-sl50.dts
ARM: dts: am335x-sl50: Enable SPI0 interface and Flash Memory.
[linux.git] / arch / arm / boot / dts / am335x-sl50.dts
index 89ddf26b94d3923bbc1bef2d6dfd4fd78685ad49..6f320780d0cc55c3879def69595067f9f209471f 100644 (file)
@@ -262,6 +262,16 @@ AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6)        /* gpmc_a3.ehrpwm1b */
                >;
        };
 
+       spi0_pins: pinmux_spi0_pins {
+               pinctrl-single,pins = <
+                       AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_MOSI - spi0_d0.spi0_d0 */
+                       AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_MISO - spi0_d1.spi0_d1 */
+                       AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_CLK  - spi0_clk.spi0_clk */
+                       AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_CS0 (NBATTSS) - spi0_cs0.spi0_cs0 */
+                       AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_CS1 (FPGA_FLASH_NCS) - spi0_cs1.spi0_cs1 */
+               >;
+       };
+
        lwb_pins: pinmux_lwb_pins {
                pinctrl-single,pins = <
                        AM33XX_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7)     /* SoundPA_en - mcasp0_fsr.gpio3_19 */
@@ -400,6 +410,20 @@ &uart4 {
        pinctrl-0 = <&uart4_pins>;
 };
 
+&spi0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi0_pins>;
+
+       flash: n25q032@1 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "micron,n25q032";
+               reg = <1>;
+               spi-max-frequency = <5000000>;
+       };
+};
+
 #include "tps65217.dtsi"
 
 &tps {