Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

[linux.git] / arch / arm / boot / dts / bcm283x.dtsi

diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 35cea3fcaf5c479e68e50e5d8e6606cb9735abba..561f27d8d92224fe8f4f8c3224a5441f2d41175a 100644 (file)
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -198,8 +198,8 @@ i2c0_gpio0: i2c0_gpio0 {
                                brcm,pins = <0 1>;
                                brcm,function = <BCM2835_FSEL_ALT0>;
                        };
-                       i2c0_gpio32: i2c0_gpio32 {
-                               brcm,pins = <32 34>;
+                       i2c0_gpio28: i2c0_gpio28 {
+                               brcm,pins = <28 29>;
                                brcm,function = <BCM2835_FSEL_ALT0>;
                        };
                        i2c0_gpio44: i2c0_gpio44 {
@@ -295,20 +295,28 @@ uart0_gpio14: uart0_gpio14 {
                        /* Separate from the uart0_gpio14 group
                         * because it conflicts with spi1_gpio16, and
                         * people often run uart0 on the two pins
-                        * without flow contrl.
+                        * without flow control.
                         */
                        uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
                                brcm,pins = <16 17>;
                                brcm,function = <BCM2835_FSEL_ALT3>;
                        };
-                       uart0_gpio30: uart0_gpio30 {
+                       uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 {
                                brcm,pins = <30 31>;
                                brcm,function = <BCM2835_FSEL_ALT3>;
                        };
-                       uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
+                       uart0_gpio32: uart0_gpio32 {
                                brcm,pins = <32 33>;
                                brcm,function = <BCM2835_FSEL_ALT3>;
                        };
+                       uart0_gpio36: uart0_gpio36 {
+                               brcm,pins = <36 37>;
+                               brcm,function = <BCM2835_FSEL_ALT2>;
+                       };
+                       uart0_ctsrts_gpio38: uart0_ctsrts_gpio38 {
+                               brcm,pins = <38 39>;
+                               brcm,function = <BCM2835_FSEL_ALT2>;
+                       };
 
                        uart1_gpio14: uart1_gpio14 {
                                brcm,pins = <14 15>;
@@ -326,10 +334,6 @@ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
                                brcm,pins = <30 31>;
                                brcm,function = <BCM2835_FSEL_ALT5>;
                        };
-                       uart1_gpio36: uart1_gpio36 {
-                               brcm,pins = <36 37 38 39>;
-                               brcm,function = <BCM2835_FSEL_ALT2>;
-                       };
                        uart1_gpio40: uart1_gpio40 {
                                brcm,pins = <40 41>;
                                brcm,function = <BCM2835_FSEL_ALT5>;