]> asedeno.scripts.mit.edu Git - linux.git/blobdiff - arch/arm/boot/dts/bcm283x.dtsi
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
[linux.git] / arch / arm / boot / dts / bcm283x.dtsi
index a3106aa446c6906108c90952cd39520ff195ef79..561f27d8d92224fe8f4f8c3224a5441f2d41175a 100644 (file)
@@ -93,10 +93,13 @@ clocks: cprman@7e101000 {
                        #clock-cells = <1>;
                        reg = <0x7e101000 0x2000>;
 
-                       /* CPRMAN derives everything from the platform's
-                        * oscillator.
+                       /* CPRMAN derives almost everything from the
+                        * platform's oscillator.  However, the DSI
+                        * pixel clocks come from the DSI analog PHY.
                         */
-                       clocks = <&clk_osc>;
+                       clocks = <&clk_osc>,
+                               <&dsi0 0>, <&dsi0 1>, <&dsi0 2>,
+                               <&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
                };
 
                rng@7e104000 {
@@ -195,8 +198,8 @@ i2c0_gpio0: i2c0_gpio0 {
                                brcm,pins = <0 1>;
                                brcm,function = <BCM2835_FSEL_ALT0>;
                        };
-                       i2c0_gpio32: i2c0_gpio32 {
-                               brcm,pins = <32 34>;
+                       i2c0_gpio28: i2c0_gpio28 {
+                               brcm,pins = <28 29>;
                                brcm,function = <BCM2835_FSEL_ALT0>;
                        };
                        i2c0_gpio44: i2c0_gpio44 {
@@ -292,20 +295,28 @@ uart0_gpio14: uart0_gpio14 {
                        /* Separate from the uart0_gpio14 group
                         * because it conflicts with spi1_gpio16, and
                         * people often run uart0 on the two pins
-                        * without flow contrl.
+                        * without flow control.
                         */
                        uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
                                brcm,pins = <16 17>;
                                brcm,function = <BCM2835_FSEL_ALT3>;
                        };
-                       uart0_gpio30: uart0_gpio30 {
+                       uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 {
                                brcm,pins = <30 31>;
                                brcm,function = <BCM2835_FSEL_ALT3>;
                        };
-                       uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
+                       uart0_gpio32: uart0_gpio32 {
                                brcm,pins = <32 33>;
                                brcm,function = <BCM2835_FSEL_ALT3>;
                        };
+                       uart0_gpio36: uart0_gpio36 {
+                               brcm,pins = <36 37>;
+                               brcm,function = <BCM2835_FSEL_ALT2>;
+                       };
+                       uart0_ctsrts_gpio38: uart0_ctsrts_gpio38 {
+                               brcm,pins = <38 39>;
+                               brcm,function = <BCM2835_FSEL_ALT2>;
+                       };
 
                        uart1_gpio14: uart1_gpio14 {
                                brcm,pins = <14 15>;
@@ -323,10 +334,6 @@ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
                                brcm,pins = <30 31>;
                                brcm,function = <BCM2835_FSEL_ALT5>;
                        };
-                       uart1_gpio36: uart1_gpio36 {
-                               brcm,pins = <36 37 38 39>;
-                               brcm,function = <BCM2835_FSEL_ALT2>;
-                       };
                        uart1_gpio40: uart1_gpio40 {
                                brcm,pins = <40 41>;
                                brcm,function = <BCM2835_FSEL_ALT5>;
@@ -347,6 +354,16 @@ uart0: serial@7e201000 {
                        arm,primecell-periphid = <0x00241011>;
                };
 
+               sdhost: mmc@7e202000 {
+                       compatible = "brcm,bcm2835-sdhost";
+                       reg = <0x7e202000 0x100>;
+                       interrupts = <2 24>;
+                       clocks = <&clocks BCM2835_CLOCK_VPU>;
+                       dmas = <&dma 13>;
+                       dma-names = "rx-tx";
+                       status = "disabled";
+               };
+
                i2s: i2s@7e203000 {
                        compatible = "brcm,bcm2835-i2s";
                        reg = <0x7e203000 0x20>,
@@ -390,6 +407,25 @@ pixelvalve@7e207000 {
                        interrupts = <2 14>; /* pwa1 */
                };
 
+               dsi0: dsi@7e209000 {
+                       compatible = "brcm,bcm2835-dsi0";
+                       reg = <0x7e209000 0x78>;
+                       interrupts = <2 4>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       #clock-cells = <1>;
+
+                       clocks = <&clocks BCM2835_PLLA_DSI0>,
+                                <&clocks BCM2835_CLOCK_DSI0E>,
+                                <&clocks BCM2835_CLOCK_DSI0P>;
+                       clock-names = "phy", "escape", "pixel";
+
+                       clock-output-names = "dsi0_byte",
+                                            "dsi0_ddr2",
+                                            "dsi0_ddr";
+
+               };
+
                thermal: thermal@7e212000 {
                        compatible = "brcm,bcm2835-thermal";
                        reg = <0x7e212000 0x8>;
@@ -456,6 +492,26 @@ hvs@7e400000 {
                        interrupts = <2 1>;
                };
 
+               dsi1: dsi@7e700000 {
+                       compatible = "brcm,bcm2835-dsi1";
+                       reg = <0x7e700000 0x8c>;
+                       interrupts = <2 12>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       #clock-cells = <1>;
+
+                       clocks = <&clocks BCM2835_PLLD_DSI1>,
+                                <&clocks BCM2835_CLOCK_DSI1E>,
+                                <&clocks BCM2835_CLOCK_DSI1P>;
+                       clock-names = "phy", "escape", "pixel";
+
+                       clock-output-names = "dsi1_byte",
+                                            "dsi1_ddr2",
+                                            "dsi1_ddr";
+
+                       status = "disabled";
+               };
+
                i2c1: i2c@7e804000 {
                        compatible = "brcm,bcm2835-i2c";
                        reg = <0x7e804000 0x1000>;
@@ -499,6 +555,8 @@ hdmi: hdmi@7e902000 {
                        clocks = <&clocks BCM2835_PLLH_PIX>,
                                 <&clocks BCM2835_CLOCK_HSM>;
                        clock-names = "pixel", "hdmi";
+                       dmas = <&dma 17>;
+                       dma-names = "audio-rx";
                        status = "disabled";
                };