]> asedeno.scripts.mit.edu Git - linux.git/blobdiff - arch/arm/boot/dts/omap5.dtsi
Merge tag 'omap-for-v4.1/prcm-dts' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux.git] / arch / arm / boot / dts / omap5.dtsi
index ddff674bd05edd2df3482e35628871628286f2c9..3cdb5c22148d9123479111f1a61e656bf9b0e8a9 100644 (file)
@@ -129,99 +129,141 @@ ocp {
                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 
-               prm: prm@4ae06000 {
-                       compatible = "ti,omap5-prm";
-                       reg = <0x4ae06000 0x3000>;
-                       interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+               l4_cfg: l4@4a000000 {
+                       compatible = "ti,omap5-l4-cfg", "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x4a000000 0x22a000>;
 
-                       prm_clocks: clocks {
+                       scm_core: scm@2000 {
+                               compatible = "ti,omap5-scm-core", "simple-bus";
+                               reg = <0x2000 0x1000>;
                                #address-cells = <1>;
-                               #size-cells = <0>;
+                               #size-cells = <1>;
+                               ranges = <0 0x2000 0x800>;
+
+                               scm_conf: scm_conf@0 {
+                                       compatible = "syscon";
+                                       reg = <0x0 0x800>;
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+                               };
                        };
 
-                       prm_clockdomains: clockdomains {
+                       scm_padconf_core: scm@2800 {
+                               compatible = "ti,omap5-scm-padconf-core",
+                                            "simple-bus";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0 0x2800 0x800>;
+
+                               omap5_pmx_core: pinmux@40 {
+                                       compatible = "ti,omap5-padconf",
+                                                    "pinctrl-single";
+                                       reg = <0x40 0x01b6>;
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       #interrupt-cells = <1>;
+                                       interrupt-controller;
+                                       pinctrl-single,register-width = <16>;
+                                       pinctrl-single,function-mask = <0x7fff>;
+                               };
+
+                               omap5_padconf_global: omap5_padconf_global@5a0 {
+                                       compatible = "syscon";
+                                       reg = <0x5a0 0xec>;
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       pbias_regulator: pbias_regulator {
+                                               compatible = "ti,pbias-omap";
+                                               reg = <0x60 0x4>;
+                                               syscon = <&omap5_padconf_global>;
+                                               pbias_mmc_reg: pbias_mmc_omap5 {
+                                                       regulator-name = "pbias_mmc_omap5";
+                                                       regulator-min-microvolt = <1800000>;
+                                                       regulator-max-microvolt = <3000000>;
+                                               };
+                                       };
+                               };
                        };
-               };
 
-               cm_core_aon: cm_core_aon@4a004000 {
-                       compatible = "ti,omap5-cm-core-aon";
-                       reg = <0x4a004000 0x2000>;
+                       cm_core_aon: cm_core_aon@4000 {
+                               compatible = "ti,omap5-cm-core-aon";
+                               reg = <0x4000 0x2000>;
 
-                       cm_core_aon_clocks: clocks {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-                       };
+                               cm_core_aon_clocks: clocks {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                               };
 
-                       cm_core_aon_clockdomains: clockdomains {
+                               cm_core_aon_clockdomains: clockdomains {
+                               };
                        };
-               };
 
-               scrm: scrm@4ae0a000 {
-                       compatible = "ti,omap5-scrm";
-                       reg = <0x4ae0a000 0x2000>;
+                       cm_core: cm_core@8000 {
+                               compatible = "ti,omap5-cm-core";
+                               reg = <0x8000 0x3000>;
 
-                       scrm_clocks: clocks {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-                       };
+                               cm_core_clocks: clocks {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                               };
 
-                       scrm_clockdomains: clockdomains {
+                               cm_core_clockdomains: clockdomains {
+                               };
                        };
                };
 
-               cm_core: cm_core@4a008000 {
-                       compatible = "ti,omap5-cm-core";
-                       reg = <0x4a008000 0x3000>;
+               l4_wkup: l4@4ae00000 {
+                       compatible = "ti,omap5-l4-wkup", "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x4ae00000 0x2b000>;
 
-                       cm_core_clocks: clocks {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
+                       counter32k: counter@4000 {
+                               compatible = "ti,omap-counter32k";
+                               reg = <0x4000 0x40>;
+                               ti,hwmods = "counter_32k";
                        };
 
-                       cm_core_clockdomains: clockdomains {
+                       prm: prm@6000 {
+                               compatible = "ti,omap5-prm";
+                               reg = <0x6000 0x3000>;
+                               interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+
+                               prm_clocks: clocks {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                               };
+
+                               prm_clockdomains: clockdomains {
+                               };
                        };
-               };
 
-               counter32k: counter@4ae04000 {
-                       compatible = "ti,omap-counter32k";
-                       reg = <0x4ae04000 0x40>;
-                       ti,hwmods = "counter_32k";
-               };
+                       scrm: scrm@a000 {
+                               compatible = "ti,omap5-scrm";
+                               reg = <0xa000 0x2000>;
 
-               omap5_pmx_core: pinmux@4a002840 {
-                       compatible = "ti,omap5-padconf", "pinctrl-single";
-                       reg = <0x4a002840 0x01b6>;
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       #interrupt-cells = <1>;
-                       interrupt-controller;
-                       pinctrl-single,register-width = <16>;
-                       pinctrl-single,function-mask = <0x7fff>;
-               };
-               omap5_pmx_wkup: pinmux@4ae0c840 {
-                       compatible = "ti,omap5-padconf", "pinctrl-single";
-                       reg = <0x4ae0c840 0x0038>;
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       #interrupt-cells = <1>;
-                       interrupt-controller;
-                       pinctrl-single,register-width = <16>;
-                       pinctrl-single,function-mask = <0x7fff>;
-               };
+                               scrm_clocks: clocks {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                               };
 
-               omap5_padconf_global: tisyscon@4a002da0 {
-                       compatible = "syscon";
-                       reg = <0x4A002da0 0xec>;
-               };
+                               scrm_clockdomains: clockdomains {
+                               };
+                       };
 
-               pbias_regulator: pbias_regulator {
-                       compatible = "ti,pbias-omap";
-                       reg = <0x60 0x4>;
-                       syscon = <&omap5_padconf_global>;
-                       pbias_mmc_reg: pbias_mmc_omap5 {
-                               regulator-name = "pbias_mmc_omap5";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <3000000>;
+                       omap5_pmx_wkup: pinmux@c840 {
+                               compatible = "ti,omap5-padconf",
+                                            "pinctrl-single";
+                               reg = <0xc840 0x0038>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               #interrupt-cells = <1>;
+                               interrupt-controller;
+                               pinctrl-single,register-width = <16>;
+                               pinctrl-single,function-mask = <0x7fff>;
                        };
                };