]> asedeno.scripts.mit.edu Git - linux.git/blobdiff - arch/arm/boot/dts/r8a7794.dtsi
ARM: dts: r8a7794: Add DU1 clock to device tree
[linux.git] / arch / arm / boot / dts / r8a7794.dtsi
index 38bf9ed8e739ea2bbccc499a2170d9e2c0a9bff6..f5f8d1c03ef7c3a3e12b4d13b21ba372af8dd7a1 100644 (file)
@@ -1270,19 +1270,21 @@ mstp7_clks: mstp7_clks@e615014c {
                        clocks = <&mp_clk>, <&hp_clk>,
                                 <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
                                 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
-                                <&zx_clk>;
+                                <&zx_clk>, <&zx_clk>;
                        #clock-cells = <1>;
                        clock-indices = <
                                R8A7794_CLK_EHCI R8A7794_CLK_HSUSB
                                R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5
                                R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0
                                R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1
-                               R8A7794_CLK_SCIF0 R8A7794_CLK_DU0
+                               R8A7794_CLK_SCIF0
+                               R8A7794_CLK_DU1 R8A7794_CLK_DU0
                        >;
                        clock-output-names =
                                "ehci", "hsusb",
                                "hscif2", "scif5", "scif4", "hscif1", "hscif0",
-                               "scif3", "scif2", "scif1", "scif0", "du0";
+                               "scif3", "scif2", "scif1", "scif0",
+                               "du1", "du0";
                };
                mstp8_clks: mstp8_clks@e6150990 {
                        compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";