]> asedeno.scripts.mit.edu Git - linux.git/blobdiff - arch/arm/mach-omap2/omap_hwmod_44xx_data.c
ARM: OMAP2+: Drop legacy platform data for omap4 mcbsp
[linux.git] / arch / arm / mach-omap2 / omap_hwmod_44xx_data.c
index e6357ae795304c35373842cda0fc6228fc3aedfb..57fbf4130c208de403ac876e3f8e2814d389fabb 100644 (file)
@@ -1324,113 +1324,6 @@ static struct omap_hwmod omap44xx_mcasp_hwmod = {
        },
 };
 
-/*
- * 'mcbsp' class
- * multi channel buffered serial port controller
- */
-
-static struct omap_hwmod_class_sysconfig omap44xx_mcbsp_sysc = {
-       .rev_offs       = -ENODEV,
-       .sysc_offs      = 0x008c,
-       .sysc_flags     = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_ENAWAKEUP |
-                          SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
-       .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-       .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = {
-       .name   = "mcbsp",
-       .sysc   = &omap44xx_mcbsp_sysc,
-};
-
-/* mcbsp1 */
-static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {
-       { .role = "pad_fck", .clk = "pad_clks_ck" },
-       { .role = "prcm_fck", .clk = "mcbsp1_sync_mux_ck" },
-};
-
-static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
-       .name           = "mcbsp1",
-       .class          = &omap44xx_mcbsp_hwmod_class,
-       .clkdm_name     = "abe_clkdm",
-       .main_clk       = "func_mcbsp1_gfclk",
-       .prcm = {
-               .omap4 = {
-                       .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET,
-                       .context_offs = OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET,
-                       .modulemode   = MODULEMODE_SWCTRL,
-               },
-       },
-       .opt_clks       = mcbsp1_opt_clks,
-       .opt_clks_cnt   = ARRAY_SIZE(mcbsp1_opt_clks),
-};
-
-/* mcbsp2 */
-static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {
-       { .role = "pad_fck", .clk = "pad_clks_ck" },
-       { .role = "prcm_fck", .clk = "mcbsp2_sync_mux_ck" },
-};
-
-static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
-       .name           = "mcbsp2",
-       .class          = &omap44xx_mcbsp_hwmod_class,
-       .clkdm_name     = "abe_clkdm",
-       .main_clk       = "func_mcbsp2_gfclk",
-       .prcm = {
-               .omap4 = {
-                       .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET,
-                       .context_offs = OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET,
-                       .modulemode   = MODULEMODE_SWCTRL,
-               },
-       },
-       .opt_clks       = mcbsp2_opt_clks,
-       .opt_clks_cnt   = ARRAY_SIZE(mcbsp2_opt_clks),
-};
-
-/* mcbsp3 */
-static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {
-       { .role = "pad_fck", .clk = "pad_clks_ck" },
-       { .role = "prcm_fck", .clk = "mcbsp3_sync_mux_ck" },
-};
-
-static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
-       .name           = "mcbsp3",
-       .class          = &omap44xx_mcbsp_hwmod_class,
-       .clkdm_name     = "abe_clkdm",
-       .main_clk       = "func_mcbsp3_gfclk",
-       .prcm = {
-               .omap4 = {
-                       .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET,
-                       .context_offs = OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET,
-                       .modulemode   = MODULEMODE_SWCTRL,
-               },
-       },
-       .opt_clks       = mcbsp3_opt_clks,
-       .opt_clks_cnt   = ARRAY_SIZE(mcbsp3_opt_clks),
-};
-
-/* mcbsp4 */
-static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {
-       { .role = "pad_fck", .clk = "pad_clks_ck" },
-       { .role = "prcm_fck", .clk = "mcbsp4_sync_mux_ck" },
-};
-
-static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
-       .name           = "mcbsp4",
-       .class          = &omap44xx_mcbsp_hwmod_class,
-       .clkdm_name     = "l4_per_clkdm",
-       .main_clk       = "per_mcbsp4_gfclk",
-       .prcm = {
-               .omap4 = {
-                       .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET,
-                       .context_offs = OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET,
-                       .modulemode   = MODULEMODE_SWCTRL,
-               },
-       },
-       .opt_clks       = mcbsp4_opt_clks,
-       .opt_clks_cnt   = ARRAY_SIZE(mcbsp4_opt_clks),
-};
-
 /*
  * 'mcpdm' class
  * multi channel pdm controller (proprietary interface with phoenix power
@@ -2938,38 +2831,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcasp_dma = {
        .user           = OCP_USER_SDMA,
 };
 
-/* l4_abe -> mcbsp1 */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = {
-       .master         = &omap44xx_l4_abe_hwmod,
-       .slave          = &omap44xx_mcbsp1_hwmod,
-       .clk            = "ocp_abe_iclk",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-/* l4_abe -> mcbsp2 */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = {
-       .master         = &omap44xx_l4_abe_hwmod,
-       .slave          = &omap44xx_mcbsp2_hwmod,
-       .clk            = "ocp_abe_iclk",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-/* l4_abe -> mcbsp3 */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = {
-       .master         = &omap44xx_l4_abe_hwmod,
-       .slave          = &omap44xx_mcbsp3_hwmod,
-       .clk            = "ocp_abe_iclk",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-/* l4_per -> mcbsp4 */
-static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = {
-       .master         = &omap44xx_l4_per_hwmod,
-       .slave          = &omap44xx_mcbsp4_hwmod,
-       .clk            = "l4_div_ck",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
 /* l4_abe -> mcpdm */
 static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = {
        .master         = &omap44xx_l4_abe_hwmod,
@@ -3308,10 +3169,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
        &omap44xx_l4_wkup__kbd,
        &omap44xx_l4_abe__mcasp,
        &omap44xx_l4_abe__mcasp_dma,
-       &omap44xx_l4_abe__mcbsp1,
-       &omap44xx_l4_abe__mcbsp2,
-       &omap44xx_l4_abe__mcbsp3,
-       &omap44xx_l4_per__mcbsp4,
        &omap44xx_l4_abe__mcpdm,
        &omap44xx_l3_main_2__mmu_ipu,
        &omap44xx_l4_cfg__mmu_dsp,