Merge branches 'pm-core', 'pm-qos', 'pm-domains' and 'pm-opp'

[linux.git] / drivers / edac / amd64_edac.c

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 26025117783087541af87e31b4e3d57a0e20cf21..82dab1692264d04baeb409622d54bbd895e013ff 100644 (file)
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -3065,6 +3065,8 @@ static bool ecc_enabled(struct pci_dev *F3, u16 nid)
                /* Check whether at least one UMC is enabled: */
                if (umc_en_mask)
                        ecc_en = umc_en_mask == ecc_en_mask;
+               else
+                       edac_dbg(0, "Node %d: No enabled UMCs.\n", nid);
 
                /* Assume UMC MCA banks are enabled. */
                nb_mce_en = true;
@@ -3075,14 +3077,15 @@ static bool ecc_enabled(struct pci_dev *F3, u16 nid)
 
                nb_mce_en = nb_mce_bank_enabled_on_node(nid);
                if (!nb_mce_en)
-                       amd64_notice("NB MCE bank disabled, set MSR 0x%08x[4] on node %d to enable.\n",
+                       edac_dbg(0, "NB MCE bank disabled, set MSR 0x%08x[4] on node %d to enable.\n",
                                     MSR_IA32_MCG_CTL, nid);
        }
 
-       amd64_info("DRAM ECC %s.\n", (ecc_en ? "enabled" : "disabled"));
+       amd64_info("Node %d: DRAM ECC %s.\n",
+                  nid, (ecc_en ? "enabled" : "disabled"));
 
        if (!ecc_en || !nb_mce_en) {
-               amd64_notice("%s", ecc_msg);
+               amd64_info("%s", ecc_msg);
                return false;
        }
        return true;
@@ -3300,15 +3303,6 @@ static int init_one_instance(unsigned int nid)
                goto err_add_mc;
        }
 
-       /* register stuff with EDAC MCE */
-       if (report_gart_errors)
-               amd_report_gart_errors(true);
-
-       if (pvt->umc)
-               amd_register_ecc_decoder(decode_umc_error);
-       else
-               amd_register_ecc_decoder(decode_bus_error);
-
        return 0;
 
 err_add_mc:
@@ -3342,7 +3336,7 @@ static int probe_one_instance(unsigned int nid)
        ecc_stngs[nid] = s;
 
        if (!ecc_enabled(F3, nid)) {
-               ret = -ENODEV;
+               ret = 0;
 
                if (!ecc_enable_override)
                        goto err_enable;
@@ -3363,6 +3357,8 @@ static int probe_one_instance(unsigned int nid)
 
                if (boot_cpu_data.x86 < 0x17)
                        restore_ecc_error_reporting(s, nid, F3);
+
+               goto err_enable;
        }
 
        return ret;
@@ -3396,14 +3392,6 @@ static void remove_one_instance(unsigned int nid)
 
        free_mc_sibling_devs(pvt);
 
-       /* unregister from EDAC MCE */
-       amd_report_gart_errors(false);
-
-       if (pvt->umc)
-               amd_unregister_ecc_decoder(decode_umc_error);
-       else
-               amd_unregister_ecc_decoder(decode_bus_error);
-
        kfree(ecc_stngs[nid]);
        ecc_stngs[nid] = NULL;
 
@@ -3452,8 +3440,11 @@ static int __init amd64_edac_init(void)
        int err = -ENODEV;
        int i;
 
+       if (!x86_match_cpu(amd64_cpuids))
+               return -ENODEV;
+
        if (amd_cache_northbridges() < 0)
-               goto err_ret;
+               return -ENODEV;
 
        opstate_init();
 
@@ -3466,14 +3457,30 @@ static int __init amd64_edac_init(void)
        if (!msrs)
                goto err_free;
 
-       for (i = 0; i < amd_nb_num(); i++)
-               if (probe_one_instance(i)) {
+       for (i = 0; i < amd_nb_num(); i++) {
+               err = probe_one_instance(i);
+               if (err) {
                        /* unwind properly */
                        while (--i >= 0)
                                remove_one_instance(i);
 
                        goto err_pci;
                }
+       }
+
+       if (!edac_has_mcs()) {
+               err = -ENODEV;
+               goto err_pci;
+       }
+
+       /* register stuff with EDAC MCE */
+       if (report_gart_errors)
+               amd_report_gart_errors(true);
+
+       if (boot_cpu_data.x86 >= 0x17)
+               amd_register_ecc_decoder(decode_umc_error);
+       else
+               amd_register_ecc_decoder(decode_bus_error);
 
        setup_pci_device();
 
@@ -3493,7 +3500,6 @@ static int __init amd64_edac_init(void)
        kfree(ecc_stngs);
        ecc_stngs = NULL;
 
-err_ret:
        return err;
 }
 
@@ -3504,6 +3510,14 @@ static void __exit amd64_edac_exit(void)
        if (pci_ctl)
                edac_pci_release_generic_ctl(pci_ctl);
 
+       /* unregister from EDAC MCE */
+       amd_report_gart_errors(false);
+
+       if (boot_cpu_data.x86 >= 0x17)
+               amd_unregister_ecc_decoder(decode_umc_error);
+       else
+               amd_unregister_ecc_decoder(decode_bus_error);
+
        for (i = 0; i < amd_nb_num(); i++)
                remove_one_instance(i);