Merge branch 'ras-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[linux.git] / drivers / fpga / dfl.h

diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
index a8b869e9e5b79f6d19d41d2600d4c239c7234499..9f0e656de720e08c11678383acdf92fdc02e8e70 100644 (file)
--- a/drivers/fpga/dfl.h
+++ b/drivers/fpga/dfl.h
@@ -30,8 +30,8 @@
 /* plus one for fme device */
 #define MAX_DFL_FEATURE_DEV_NUM    (MAX_DFL_FPGA_PORT_NUM + 1)
 
-/* Reserved 0x0 for Header Group Register and 0xff for AFU */
-#define FEATURE_ID_FIU_HEADER          0x0
+/* Reserved 0xfe for Header Group Register and 0xff for AFU */
+#define FEATURE_ID_FIU_HEADER          0xfe
 #define FEATURE_ID_AFU                 0xff
 
 #define FME_FEATURE_ID_HEADER          FEATURE_ID_FIU_HEADER
@@ -119,6 +119,11 @@
 #define PORT_HDR_NEXT_AFU      NEXT_AFU
 #define PORT_HDR_CAP           0x30
 #define PORT_HDR_CTRL          0x38
+#define PORT_HDR_STS           0x40
+#define PORT_HDR_USRCLK_CMD0   0x50
+#define PORT_HDR_USRCLK_CMD1   0x58
+#define PORT_HDR_USRCLK_STS0   0x60
+#define PORT_HDR_USRCLK_STS1   0x68
 
 /* Port Capability Register Bitfield */
 #define PORT_CAP_PORT_NUM      GENMASK_ULL(1, 0)       /* ID of this port */
@@ -130,6 +135,16 @@
 /* Latency tolerance reporting. '1' >= 40us, '0' < 40us.*/
 #define PORT_CTRL_LATENCY      BIT_ULL(2)
 #define PORT_CTRL_SFTRST_ACK   BIT_ULL(4)              /* HW ack for reset */
+
+/* Port Status Register Bitfield */
+#define PORT_STS_AP2_EVT       BIT_ULL(13)             /* AP2 event detected */
+#define PORT_STS_AP1_EVT       BIT_ULL(12)             /* AP1 event detected */
+#define PORT_STS_PWR_STATE     GENMASK_ULL(11, 8)      /* AFU power states */
+#define PORT_STS_PWR_STATE_NORM 0
+#define PORT_STS_PWR_STATE_AP1 1                       /* 50% throttling */
+#define PORT_STS_PWR_STATE_AP2 2                       /* 90% throttling */
+#define PORT_STS_PWR_STATE_AP6 6                       /* 100% throttling */
+
 /**
  * struct dfl_fpga_port_ops - port ops
  *
@@ -154,13 +169,22 @@ void dfl_fpga_port_ops_put(struct dfl_fpga_port_ops *ops);
 int dfl_fpga_check_port_id(struct platform_device *pdev, void *pport_id);
 
 /**
- * struct dfl_feature_driver - sub feature's driver
+ * struct dfl_feature_id - dfl private feature id
  *
- * @id: sub feature id.
- * @ops: ops of this sub feature.
+ * @id: unique dfl private feature id.
  */
-struct dfl_feature_driver {
+struct dfl_feature_id {
        u64 id;
+};
+
+/**
+ * struct dfl_feature_driver - dfl private feature driver
+ *
+ * @id_table: id_table for dfl private features supported by this driver.
+ * @ops: ops of this dfl private feature driver.
+ */
+struct dfl_feature_driver {
+       const struct dfl_feature_id *id_table;
        const struct dfl_feature_ops *ops;
 };
 
@@ -183,6 +207,8 @@ struct dfl_feature {
 
 #define DEV_STATUS_IN_USE      0
 
+#define FEATURE_DEV_ID_UNUSED  (-1)
+
 /**
  * struct dfl_feature_platform_data - platform data for feature devices
  *
@@ -191,6 +217,7 @@ struct dfl_feature {
  * @cdev: cdev of feature dev.
  * @dev: ptr to platform device linked with this platform data.
  * @dfl_cdev: ptr to container device.
+ * @id: id used for this feature device.
  * @disable_count: count for port disable.
  * @num: number for sub features.
  * @dev_status: dev status (e.g. DEV_STATUS_IN_USE).
@@ -203,6 +230,7 @@ struct dfl_feature_platform_data {
        struct cdev cdev;
        struct platform_device *dev;
        struct dfl_fpga_cdev *dfl_cdev;
+       int id;
        unsigned int disable_count;
        unsigned long dev_status;
        void *private;
@@ -331,6 +359,11 @@ static inline bool dfl_feature_is_port(void __iomem *base)
                (FIELD_GET(DFH_ID, v) == DFH_ID_FIU_PORT);
 }
 
+static inline u8 dfl_feature_revision(void __iomem *base)
+{
+       return (u8)FIELD_GET(DFH_REVISION, readq(base + DFH));
+}
+
 /**
  * struct dfl_fpga_enum_info - DFL FPGA enumeration information
  *
@@ -373,6 +406,7 @@ void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info);
  * @fme_dev: FME feature device under this container device.
  * @lock: mutex lock to protect the port device list.
  * @port_dev_list: list of all port feature devices under this container device.
+ * @released_port_num: released port number under this container device.
  */
 struct dfl_fpga_cdev {
        struct device *parent;
@@ -380,6 +414,7 @@ struct dfl_fpga_cdev {
        struct device *fme_dev;
        struct mutex lock;
        struct list_head port_dev_list;
+       int released_port_num;
 };
 
 struct dfl_fpga_cdev *
@@ -407,4 +442,9 @@ dfl_fpga_cdev_find_port(struct dfl_fpga_cdev *cdev, void *data,
 
        return pdev;
 }
+
+int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id);
+int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev *cdev, int port_id);
+void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cdev *cdev);
+int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vf);
 #endif /* __FPGA_DFL_H */