]> asedeno.scripts.mit.edu Git - linux.git/blobdiff - drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
drm/amdgpu: correctly sign extend 48bit addresses v3
[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_amdkfd.c
index 305143fcc1ceed0d1231efa742864de460b608d0..db9872f83d0381be1ac50d1d1feb4d9ccf1e018c 100644 (file)
@@ -36,36 +36,16 @@ int amdgpu_amdkfd_init(void)
 {
        int ret;
 
-#if defined(CONFIG_HSA_AMD_MODULE)
-       int (*kgd2kfd_init_p)(unsigned int, const struct kgd2kfd_calls**);
-
-       kgd2kfd_init_p = symbol_request(kgd2kfd_init);
-
-       if (kgd2kfd_init_p == NULL)
-               return -ENOENT;
-
-       ret = kgd2kfd_init_p(KFD_INTERFACE_VERSION, &kgd2kfd);
-       if (ret) {
-               symbol_put(kgd2kfd_init);
-               kgd2kfd = NULL;
-       }
-
-
-#elif defined(CONFIG_HSA_AMD)
-
+#ifdef CONFIG_HSA_AMD
        ret = kgd2kfd_init(KFD_INTERFACE_VERSION, &kgd2kfd);
        if (ret)
                kgd2kfd = NULL;
-
+       amdgpu_amdkfd_gpuvm_init_mem_limits();
 #else
        kgd2kfd = NULL;
        ret = -ENOENT;
 #endif
 
-#if defined(CONFIG_HSA_AMD_MODULE) || defined(CONFIG_HSA_AMD)
-       amdgpu_amdkfd_gpuvm_init_mem_limits();
-#endif
-
        return ret;
 }
 
@@ -155,7 +135,7 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
                        .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe,
                        .gpuvm_size = min(adev->vm_manager.max_pfn
                                          << AMDGPU_GPU_PAGE_SHIFT,
-                                         AMDGPU_VA_HOLE_START),
+                                         AMDGPU_GMC_HOLE_START),
                        .drm_render_minor = adev->ddev->render->index
                };
 
@@ -243,6 +223,34 @@ int amdgpu_amdkfd_resume(struct amdgpu_device *adev)
        return r;
 }
 
+int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev)
+{
+       int r = 0;
+
+       if (adev->kfd)
+               r = kgd2kfd->pre_reset(adev->kfd);
+
+       return r;
+}
+
+int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev)
+{
+       int r = 0;
+
+       if (adev->kfd)
+               r = kgd2kfd->post_reset(adev->kfd);
+
+       return r;
+}
+
+void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd)
+{
+       struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
+
+       if (amdgpu_device_should_recover_gpu(adev))
+               amdgpu_device_gpu_recover(adev, NULL);
+}
+
 int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
                        void **mem_obj, uint64_t *gpu_addr,
                        void **cpu_ptr)
@@ -251,7 +259,6 @@ int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
        struct amdgpu_bo *bo = NULL;
        struct amdgpu_bo_param bp;
        int r;
-       uint64_t gpu_addr_tmp = 0;
        void *cpu_ptr_tmp = NULL;
 
        memset(&bp, 0, sizeof(bp));
@@ -275,13 +282,18 @@ int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
                goto allocate_mem_reserve_bo_failed;
        }
 
-       r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT,
-                               &gpu_addr_tmp);
+       r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT);
        if (r) {
                dev_err(adev->dev, "(%d) failed to pin bo for amdkfd\n", r);
                goto allocate_mem_pin_bo_failed;
        }
 
+       r = amdgpu_ttm_alloc_gart(&bo->tbo);
+       if (r) {
+               dev_err(adev->dev, "%p bind failed\n", bo);
+               goto allocate_mem_kmap_bo_failed;
+       }
+
        r = amdgpu_bo_kmap(bo, &cpu_ptr_tmp);
        if (r) {
                dev_err(adev->dev,
@@ -290,7 +302,7 @@ int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
        }
 
        *mem_obj = bo;
-       *gpu_addr = gpu_addr_tmp;
+       *gpu_addr = amdgpu_bo_gpu_offset(bo);
        *cpu_ptr = cpu_ptr_tmp;
 
        amdgpu_bo_unreserve(bo);
@@ -457,6 +469,14 @@ int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine,
        return ret;
 }
 
+void amdgpu_amdkfd_set_compute_idle(struct kgd_dev *kgd, bool idle)
+{
+       struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
+
+       amdgpu_dpm_switch_power_profile(adev,
+                                       PP_SMC_POWER_PROFILE_COMPUTE, !idle);
+}
+
 bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid)
 {
        if (adev->kfd) {
@@ -467,7 +487,7 @@ bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid)
        return false;
 }
 
-#if !defined(CONFIG_HSA_AMD_MODULE) && !defined(CONFIG_HSA_AMD)
+#ifndef CONFIG_HSA_AMD
 bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm)
 {
        return false;