drm/amdgpu/vcn:Replace value with defined macro

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_gart.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index dd11b7313ca07b960867bb305f3174513b374e9c..11fea28f8ad30da94a18a28763a498bb5f84868e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
@@ -112,7 +112,7 @@ int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev)
 {
        int r;
 
-       if (adev->gart.robj == NULL) {
+       if (adev->gart.bo == NULL) {
                struct amdgpu_bo_param bp;
 
                memset(&bp, 0, sizeof(bp));
@@ -123,7 +123,7 @@ int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev)
                        AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
                bp.type = ttm_bo_type_kernel;
                bp.resv = NULL;
-               r = amdgpu_bo_create(adev, &bp, &adev->gart.robj);
+               r = amdgpu_bo_create(adev, &bp, &adev->gart.bo);
                if (r) {
                        return r;
                }
@@ -143,23 +143,20 @@ int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev)
  */
 int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev)
 {
-       uint64_t gpu_addr;
        int r;
 
-       r = amdgpu_bo_reserve(adev->gart.robj, false);
+       r = amdgpu_bo_reserve(adev->gart.bo, false);
        if (unlikely(r != 0))
                return r;
-       r = amdgpu_bo_pin(adev->gart.robj,
-                               AMDGPU_GEM_DOMAIN_VRAM, &gpu_addr);
+       r = amdgpu_bo_pin(adev->gart.bo, AMDGPU_GEM_DOMAIN_VRAM);
        if (r) {
-               amdgpu_bo_unreserve(adev->gart.robj);
+               amdgpu_bo_unreserve(adev->gart.bo);
                return r;
        }
-       r = amdgpu_bo_kmap(adev->gart.robj, &adev->gart.ptr);
+       r = amdgpu_bo_kmap(adev->gart.bo, &adev->gart.ptr);
        if (r)
-               amdgpu_bo_unpin(adev->gart.robj);
-       amdgpu_bo_unreserve(adev->gart.robj);
-       adev->gart.table_addr = gpu_addr;
+               amdgpu_bo_unpin(adev->gart.bo);
+       amdgpu_bo_unreserve(adev->gart.bo);
        return r;
 }
 
@@ -175,14 +172,14 @@ void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev)
 {
        int r;
 
-       if (adev->gart.robj == NULL) {
+       if (adev->gart.bo == NULL) {
                return;
        }
-       r = amdgpu_bo_reserve(adev->gart.robj, true);
+       r = amdgpu_bo_reserve(adev->gart.bo, true);
        if (likely(r == 0)) {
-               amdgpu_bo_kunmap(adev->gart.robj);
-               amdgpu_bo_unpin(adev->gart.robj);
-               amdgpu_bo_unreserve(adev->gart.robj);
+               amdgpu_bo_kunmap(adev->gart.bo);
+               amdgpu_bo_unpin(adev->gart.bo);
+               amdgpu_bo_unreserve(adev->gart.bo);
                adev->gart.ptr = NULL;
        }
 }
@@ -198,10 +195,10 @@ void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev)
  */
 void amdgpu_gart_table_vram_free(struct amdgpu_device *adev)
 {
-       if (adev->gart.robj == NULL) {
+       if (adev->gart.bo == NULL) {
                return;
        }
-       amdgpu_bo_unref(&adev->gart.robj);
+       amdgpu_bo_unref(&adev->gart.bo);
 }
 
 /*
@@ -234,7 +231,7 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
        }
 
        t = offset / AMDGPU_GPU_PAGE_SIZE;
-       p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
+       p = t / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
        for (i = 0; i < pages; i++, p++) {
 #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
                adev->gart.pages[p] = NULL;
@@ -243,7 +240,7 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
                if (!adev->gart.ptr)
                        continue;
 
-               for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
+               for (j = 0; j < AMDGPU_GPU_PAGES_IN_CPU_PAGE; j++, t++) {
                        amdgpu_gmc_set_pte_pde(adev, adev->gart.ptr,
                                               t, page_base, flags);
                        page_base += AMDGPU_GPU_PAGE_SIZE;
@@ -282,7 +279,7 @@ int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
 
        for (i = 0; i < pages; i++) {
                page_base = dma_addr[i];
-               for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
+               for (j = 0; j < AMDGPU_GPU_PAGES_IN_CPU_PAGE; j++, t++) {
                        amdgpu_gmc_set_pte_pde(adev, dst, t, page_base, flags);
                        page_base += AMDGPU_GPU_PAGE_SIZE;
                }
@@ -319,7 +316,7 @@ int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
 
 #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
        t = offset / AMDGPU_GPU_PAGE_SIZE;
-       p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
+       p = t / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
        for (i = 0; i < pages; i++, p++)
                adev->gart.pages[p] = pagelist ? pagelist[i] : NULL;
 #endif