drm/amdgpu: resolve bug in UMC 6 error counter query

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_umc.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
index 3283032a78e50baa7d4febb9d626296116efcf87..a615a1eb750be4b734f4bd130d9c4ab1ada7f603 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
@@ -21,38 +21,6 @@
 #ifndef __AMDGPU_UMC_H__
 #define __AMDGPU_UMC_H__
 
-/* implement 64 bits REG operations via 32 bits interface */
-#define RREG64_UMC(reg)        (RREG32(reg) | \
-                               ((uint64_t)RREG32((reg) + 1) << 32))
-#define WREG64_UMC(reg, v)     \
-       do {    \
-               WREG32((reg), lower_32_bits(v));        \
-               WREG32((reg) + 1, upper_32_bits(v));    \
-       } while (0)
-
-/*
- * void (*func)(struct amdgpu_device *adev, struct ras_err_data *err_data,
- *                             uint32_t umc_reg_offset, uint32_t channel_index)
- */
-#define amdgpu_umc_for_each_channel(func)      \
-       struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;        \
-       uint32_t umc_inst, channel_inst, umc_reg_offset, channel_index; \
-       for (umc_inst = 0; umc_inst < adev->umc.umc_inst_num; umc_inst++) {     \
-               /* enable the index mode to query eror count per channel */     \
-               adev->umc.funcs->enable_umc_index_mode(adev, umc_inst); \
-               for (channel_inst = 0;  \
-                       channel_inst < adev->umc.channel_inst_num;      \
-                       channel_inst++) {       \
-                       /* calc the register offset according to channel instance */    \
-                       umc_reg_offset = adev->umc.channel_offs * channel_inst; \
-                       /* get channel index of interleaved memory */   \
-                       channel_index = adev->umc.channel_idx_tbl[      \
-                               umc_inst * adev->umc.channel_inst_num + channel_inst];  \
-                       (func)(adev, err_data, umc_reg_offset, channel_index);  \
-               }       \
-       }       \
-       adev->umc.funcs->disable_umc_index_mode(adev);
-
 struct amdgpu_umc_funcs {
        void (*err_cnt_init)(struct amdgpu_device *adev);
        int (*ras_late_init)(struct amdgpu_device *adev);
@@ -60,9 +28,6 @@ struct amdgpu_umc_funcs {
                                        void *ras_error_status);
        void (*query_ras_error_address)(struct amdgpu_device *adev,
                                        void *ras_error_status);
-       void (*enable_umc_index_mode)(struct amdgpu_device *adev,
-                                       uint32_t umc_instance);
-       void (*disable_umc_index_mode)(struct amdgpu_device *adev);
        void (*init_registers)(struct amdgpu_device *adev);
 };