drm/amd/amdgpu: Indent AMD_IS_APU properly

[linux.git] / drivers / gpu / drm / amd / amdgpu / si.c

diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 9d8df68893b9d8a1be221adc9e6f3ccddd59e916..4d74453f3cfbd1b635155ca16a974b17910dca7c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -24,7 +24,8 @@
 #include <linux/firmware.h>
 #include <linux/slab.h>
 #include <linux/module.h>
-#include <drm/drmP.h>
+#include <linux/pci.h>
+
 #include "amdgpu.h"
 #include "amdgpu_atombios.h"
 #include "amdgpu_ih.h"
@@ -1339,8 +1340,8 @@ static void si_get_pcie_usage(struct amdgpu_device *adev, uint64_t *count0,
        /* This reports 0 on APUs, so return to avoid writing/reading registers
         * that may or may not be different from their GPU counterparts
         */
-        if (adev->flags & AMD_IS_APU)
-                return;
+       if (adev->flags & AMD_IS_APU)
+               return;
 
        /* Set the 2 events that we wish to watch, defined above */
        /* Reg 40 is # received msgs, Reg 104 is # of posted requests sent */
@@ -1375,6 +1376,18 @@ static void si_get_pcie_usage(struct amdgpu_device *adev, uint64_t *count0,
        *count1 = RREG32_PCIE(ixPCIE_PERF_COUNT1_TXCLK) | (cnt1_of << 32);
 }
 
+static uint64_t si_get_pcie_replay_count(struct amdgpu_device *adev)
+{
+       uint64_t nak_r, nak_g;
+
+       /* Get the number of NAKs received and generated */
+       nak_r = RREG32_PCIE(ixPCIE_RX_NUM_NAK);
+       nak_g = RREG32_PCIE(ixPCIE_RX_NUM_NAK_GENERATED);
+
+       /* Add the total number of NAKs, i.e the number of replays */
+       return (nak_r + nak_g);
+}
+
 static const struct amdgpu_asic_funcs si_asic_funcs =
 {
        .read_disabled_bios = &si_read_disabled_bios,
@@ -1393,6 +1406,7 @@ static const struct amdgpu_asic_funcs si_asic_funcs =
        .need_full_reset = &si_need_full_reset,
        .get_pcie_usage = &si_get_pcie_usage,
        .need_reset_on_init = &si_need_reset_on_init,
+       .get_pcie_replay_count = &si_get_pcie_replay_count,
 };
 
 static uint32_t si_get_rev_id(struct amdgpu_device *adev)