drm/amd/powerplay: cache the watermark settings on system memory

[linux.git] / drivers / gpu / drm / amd / powerplay / inc / amdgpu_smu.h

diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index ac9758305ab3be1063025e67b126e87f81aeab79..02d33b50e735281540168318560a02d29e592e8f 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -254,6 +254,7 @@ struct smu_table_context
        unsigned long                   metrics_time;
        void                            *metrics_table;
        void                            *clocks_table;
+       void                            *watermarks_table;
 
        void                            *max_sustainable_clocks;
        struct smu_bios_boot_up_values  boot_values;
@@ -282,6 +283,7 @@ struct smu_power_gate {
        bool uvd_gated;
        bool vce_gated;
        bool vcn_gated;
+       bool jpeg_gated;
 };
 
 struct smu_power_context {
@@ -349,6 +351,7 @@ struct smu_context
        const struct pptable_funcs      *ppt_funcs;
        struct mutex                    mutex;
        struct mutex                    sensor_lock;
+       struct mutex                    metrics_lock;
        uint64_t pool_size;
 
        struct smu_table_context        smu_table;
@@ -436,12 +439,13 @@ struct pptable_funcs {
        int (*set_power_profile_mode)(struct smu_context *smu, long *input, uint32_t size);
        int (*dpm_set_uvd_enable)(struct smu_context *smu, bool enable);
        int (*dpm_set_vce_enable)(struct smu_context *smu, bool enable);
+       int (*dpm_set_jpeg_enable)(struct smu_context *smu, bool enable);
        int (*read_sensor)(struct smu_context *smu, enum amd_pp_sensors sensor,
                           void *data, uint32_t *size);
        int (*pre_display_config_changed)(struct smu_context *smu);
        int (*display_config_changed)(struct smu_context *smu);
        int (*apply_clocks_adjust_rules)(struct smu_context *smu);
-       int (*notify_smc_dispaly_config)(struct smu_context *smu);
+       int (*notify_smc_display_config)(struct smu_context *smu);
        int (*force_dpm_limit_value)(struct smu_context *smu, bool highest);
        int (*unforce_dpm_levels)(struct smu_context *smu);
        int (*get_profiling_clk_mask)(struct smu_context *smu,
@@ -490,6 +494,7 @@ struct pptable_funcs {
        int (*check_fw_version)(struct smu_context *smu);
        int (*powergate_sdma)(struct smu_context *smu, bool gate);
        int (*powergate_vcn)(struct smu_context *smu, bool gate);
+       int (*powergate_jpeg)(struct smu_context *smu, bool gate);
        int (*set_gfx_cgpg)(struct smu_context *smu, bool enable);
        int (*write_pptable)(struct smu_context *smu);
        int (*set_min_dcef_deep_sleep)(struct smu_context *smu);
@@ -543,7 +548,8 @@ struct pptable_funcs {
        bool (*baco_is_support)(struct smu_context *smu);
        enum smu_baco_state (*baco_get_state)(struct smu_context *smu);
        int (*baco_set_state)(struct smu_context *smu, enum smu_baco_state state);
-       int (*baco_reset)(struct smu_context *smu);
+       int (*baco_enter)(struct smu_context *smu);
+       int (*baco_exit)(struct smu_context *smu);
        int (*mode2_reset)(struct smu_context *smu);
        int (*get_dpm_ultimate_freq)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max);
        int (*set_soft_freq_limited_range)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max);
@@ -625,7 +631,8 @@ bool smu_baco_is_support(struct smu_context *smu);
 
 int smu_baco_get_state(struct smu_context *smu, enum smu_baco_state *state);
 
-int smu_baco_reset(struct smu_context *smu);
+int smu_baco_enter(struct smu_context *smu);
+int smu_baco_exit(struct smu_context *smu);
 
 int smu_mode2_reset(struct smu_context *smu);
 
@@ -691,6 +698,8 @@ int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
                            uint32_t min, uint32_t max);
 int smu_set_hard_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
                            uint32_t min, uint32_t max);
+int smu_get_dpm_level_range(struct smu_context *smu, enum smu_clk_type clk_type,
+                           uint32_t *min_value, uint32_t *max_value);
 enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu);
 int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level);
 int smu_set_display_count(struct smu_context *smu, uint32_t count);