drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission

[linux.git] / drivers / gpu / drm / i915 / i915_drv.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 632cc12326044dcd6fc3f75f330a51dc2ed5cd8b..bbf4dfdfa8ba025cb0f7b57cc2bc00d9471270d9 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -627,13 +627,9 @@ struct ddi_vbt_port_info {
 
        int max_tmds_clock;
 
-       /*
-        * This is an index in the HDMI/DVI DDI buffer translation table.
-        * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
-        * populate this field.
-        */
-#define HDMI_LEVEL_SHIFT_UNKNOWN       0xff
+       /* This is an index in the HDMI/DVI DDI buffer translation table. */
        u8 hdmi_level_shift;
+       u8 hdmi_level_shift_set:1;
 
        u8 supports_dvi:1;
        u8 supports_hdmi:1;
@@ -724,8 +720,7 @@ struct intel_vbt_data {
 
        int crt_ddc_pin;
 
-       int child_dev_num;
-       struct child_device_config *child_dev;
+       struct list_head display_devices;
 
        struct ddi_vbt_port_info ddi_port_info[I915_MAX_PORTS];
        struct sdvo_device_mapping sdvo_mappings[2];
@@ -891,6 +886,10 @@ struct intel_cdclk_state {
        u8 voltage_level;
 };
 
+struct i915_selftest_stash {
+       atomic_t counter;
+};
+
 struct drm_i915_private {
        struct drm_device drm;
 
@@ -1248,8 +1247,6 @@ struct drm_i915_private {
        struct intel_gt gt;
 
        struct {
-               struct notifier_block pm_notifier;
-
                struct i915_gem_contexts {
                        spinlock_t lock; /* locks list */
                        struct list_head list;
@@ -1286,6 +1283,8 @@ struct drm_i915_private {
        /* Mutex to protect the above hdcp component related values. */
        struct mutex hdcp_comp_mutex;
 
+       I915_SELFTEST_DECLARE(struct i915_selftest_stash selftest;)
+
        /*
         * NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch
         * will be rejected. Instead look for a better place.
@@ -1661,7 +1660,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 /* WaRsDisableCoarsePowerGating:skl,cnl */
 #define NEEDS_WaRsDisableCoarsePowerGating(dev_priv) \
-       (IS_CANNONLAKE(dev_priv) || IS_GEN(dev_priv, 9))
+       IS_GEN_RANGE(dev_priv, 9, 10)
 
 #define HAS_GMBUS_IRQ(dev_priv) (INTEL_GEN(dev_priv) >= 4)
 #define HAS_GMBUS_BURST_READ(dev_priv) (INTEL_GEN(dev_priv) >= 10 || \
@@ -1843,14 +1842,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
                           unsigned long flags);
 #define I915_GEM_OBJECT_UNBIND_ACTIVE BIT(0)
 
-struct i915_vma * __must_check
-i915_gem_object_pin(struct drm_i915_gem_object *obj,
-                   struct i915_address_space *vm,
-                   const struct i915_ggtt_view *view,
-                   u64 size,
-                   u64 alignment,
-                   u64 flags);
-
 void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv);
 
 static inline int __must_check
@@ -2045,4 +2036,10 @@ i915_coherent_map_type(struct drm_i915_private *i915)
        return HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC;
 }
 
+static inline bool intel_guc_submission_is_enabled(struct intel_guc *guc)
+{
+       return intel_guc_is_submission_supported(guc) &&
+               intel_guc_is_running(guc);
+}
+
 #endif