]> asedeno.scripts.mit.edu Git - linux.git/blobdiff - drivers/gpu/drm/i915/intel_color.c
Merge airlied/drm-next into drm-misc-next
[linux.git] / drivers / gpu / drm / i915 / intel_color.c
index 768f1c26080e91f3388434597e189e5f0fcbfd4d..c6a7beabd58d1f636af7f3fb53a16214b4a7e6a1 100644 (file)
  * of the CTM coefficient and we write the value from bit 3. We also round the
  * value.
  */
-#define I9XX_CSC_COEFF_FP(coeff, fbits)        \
+#define ILK_CSC_COEFF_FP(coeff, fbits) \
        (clamp_val(((coeff) >> (32 - (fbits) - 3)) + 4, 0, 0xfff) & 0xff8)
 
-#define I9XX_CSC_COEFF_LIMITED_RANGE   \
-       I9XX_CSC_COEFF_FP(CTM_COEFF_LIMITED_RANGE, 9)
-#define I9XX_CSC_COEFF_1_0             \
-       ((7 << 12) | I9XX_CSC_COEFF_FP(CTM_COEFF_1_0, 8))
+#define ILK_CSC_COEFF_LIMITED_RANGE    \
+       ILK_CSC_COEFF_FP(CTM_COEFF_LIMITED_RANGE, 9)
+#define ILK_CSC_COEFF_1_0              \
+       ((7 << 12) | ILK_CSC_COEFF_FP(CTM_COEFF_1_0, 8))
 
 static bool crtc_state_is_legacy_gamma(struct drm_crtc_state *state)
 {
@@ -84,30 +84,31 @@ static bool crtc_state_is_legacy_gamma(struct drm_crtc_state *state)
 
 /*
  * When using limited range, multiply the matrix given by userspace by
- * the matrix that we would use for the limited range. We do the
- * multiplication in U2.30 format.
+ * the matrix that we would use for the limited range.
  */
-static void ctm_mult_by_limited(uint64_t *result, int64_t *input)
+static u64 *ctm_mult_by_limited(u64 *result, const u64 *input)
 {
        int i;
 
-       for (i = 0; i < 9; i++)
-               result[i] = 0;
+       for (i = 0; i < 9; i++) {
+               u64 user_coeff = input[i];
+               u32 limited_coeff = CTM_COEFF_LIMITED_RANGE;
+               u32 abs_coeff = clamp_val(CTM_COEFF_ABS(user_coeff), 0,
+                                         CTM_COEFF_4_0 - 1) >> 2;
 
-       for (i = 0; i < 3; i++) {
-               int64_t user_coeff = input[i * 3 + i];
-               uint64_t limited_coeff = CTM_COEFF_LIMITED_RANGE >> 2;
-               uint64_t abs_coeff = clamp_val(CTM_COEFF_ABS(user_coeff),
-                                              0,
-                                              CTM_COEFF_4_0 - 1) >> 2;
-
-               result[i * 3 + i] = (limited_coeff * abs_coeff) >> 27;
-               if (CTM_COEFF_NEGATIVE(user_coeff))
-                       result[i * 3 + i] |= CTM_COEFF_SIGN;
+               /*
+                * By scaling every co-efficient with limited range (16-235)
+                * vs full range (0-255) the final o/p will be scaled down to
+                * fit in the limited range supported by the panel.
+                */
+               result[i] = mul_u32_u32(limited_coeff, abs_coeff) >> 30;
+               result[i] |= user_coeff & CTM_COEFF_SIGN;
        }
+
+       return result;
 }
 
-static void i9xx_load_ycbcr_conversion_matrix(struct intel_crtc *intel_crtc)
+static void ilk_load_ycbcr_conversion_matrix(struct intel_crtc *intel_crtc)
 {
        int pipe = intel_crtc->pipe;
        struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
@@ -131,8 +132,7 @@ static void i9xx_load_ycbcr_conversion_matrix(struct intel_crtc *intel_crtc)
        I915_WRITE(PIPE_CSC_MODE(pipe), 0);
 }
 
-/* Set up the pipe CSC unit. */
-static void i9xx_load_csc_matrix(struct drm_crtc_state *crtc_state)
+static void ilk_load_csc_matrix(struct drm_crtc_state *crtc_state)
 {
        struct drm_crtc *crtc = crtc_state->crtc;
        struct drm_i915_private *dev_priv = to_i915(crtc->dev);
@@ -140,20 +140,27 @@ static void i9xx_load_csc_matrix(struct drm_crtc_state *crtc_state)
        int i, pipe = intel_crtc->pipe;
        uint16_t coeffs[9] = { 0, };
        struct intel_crtc_state *intel_crtc_state = to_intel_crtc_state(crtc_state);
+       bool limited_color_range = false;
+
+       /*
+        * FIXME if there's a gamma LUT after the CSC, we should
+        * do the range compression using the gamma LUT instead.
+        */
+       if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv))
+               limited_color_range = intel_crtc_state->limited_color_range;
 
        if (intel_crtc_state->ycbcr420) {
-               i9xx_load_ycbcr_conversion_matrix(intel_crtc);
+               ilk_load_ycbcr_conversion_matrix(intel_crtc);
                return;
        } else if (crtc_state->ctm) {
                struct drm_color_ctm *ctm = crtc_state->ctm->data;
-               uint64_t input[9] = { 0, };
+               const u64 *input;
+               u64 temp[9];
 
-               if (intel_crtc_state->limited_color_range) {
-                       ctm_mult_by_limited(input, ctm->matrix);
-               } else {
-                       for (i = 0; i < ARRAY_SIZE(input); i++)
-                               input[i] = ctm->matrix[i];
-               }
+               if (limited_color_range)
+                       input = ctm_mult_by_limited(temp, ctm->matrix);
+               else
+                       input = ctm->matrix;
 
                /*
                 * Convert fixed point S31.32 input to format supported by the
@@ -174,21 +181,21 @@ static void i9xx_load_csc_matrix(struct drm_crtc_state *crtc_state)
 
                        if (abs_coeff < CTM_COEFF_0_125)
                                coeffs[i] |= (3 << 12) |
-                                       I9XX_CSC_COEFF_FP(abs_coeff, 12);
+                                       ILK_CSC_COEFF_FP(abs_coeff, 12);
                        else if (abs_coeff < CTM_COEFF_0_25)
                                coeffs[i] |= (2 << 12) |
-                                       I9XX_CSC_COEFF_FP(abs_coeff, 11);
+                                       ILK_CSC_COEFF_FP(abs_coeff, 11);
                        else if (abs_coeff < CTM_COEFF_0_5)
                                coeffs[i] |= (1 << 12) |
-                                       I9XX_CSC_COEFF_FP(abs_coeff, 10);
+                                       ILK_CSC_COEFF_FP(abs_coeff, 10);
                        else if (abs_coeff < CTM_COEFF_1_0)
-                               coeffs[i] |= I9XX_CSC_COEFF_FP(abs_coeff, 9);
+                               coeffs[i] |= ILK_CSC_COEFF_FP(abs_coeff, 9);
                        else if (abs_coeff < CTM_COEFF_2_0)
                                coeffs[i] |= (7 << 12) |
-                                       I9XX_CSC_COEFF_FP(abs_coeff, 8);
+                                       ILK_CSC_COEFF_FP(abs_coeff, 8);
                        else
                                coeffs[i] |= (6 << 12) |
-                                       I9XX_CSC_COEFF_FP(abs_coeff, 7);
+                                       ILK_CSC_COEFF_FP(abs_coeff, 7);
                }
        } else {
                /*
@@ -200,11 +207,11 @@ static void i9xx_load_csc_matrix(struct drm_crtc_state *crtc_state)
                 * into consideration.
                 */
                for (i = 0; i < 3; i++) {
-                       if (intel_crtc_state->limited_color_range)
+                       if (limited_color_range)
                                coeffs[i * 3 + i] =
-                                       I9XX_CSC_COEFF_LIMITED_RANGE;
+                                       ILK_CSC_COEFF_LIMITED_RANGE;
                        else
-                               coeffs[i * 3 + i] = I9XX_CSC_COEFF_1_0;
+                               coeffs[i * 3 + i] = ILK_CSC_COEFF_1_0;
                }
        }
 
@@ -224,7 +231,7 @@ static void i9xx_load_csc_matrix(struct drm_crtc_state *crtc_state)
        if (INTEL_GEN(dev_priv) > 6) {
                uint16_t postoff = 0;
 
-               if (intel_crtc_state->limited_color_range)
+               if (limited_color_range)
                        postoff = (16 * (1 << 12) / 255) & 0x1fff;
 
                I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), postoff);
@@ -235,7 +242,7 @@ static void i9xx_load_csc_matrix(struct drm_crtc_state *crtc_state)
        } else {
                uint32_t mode = CSC_MODE_YUV_TO_RGB;
 
-               if (intel_crtc_state->limited_color_range)
+               if (limited_color_range)
                        mode |= CSC_BLACK_SCREEN_OFFSET;
 
                I915_WRITE(PIPE_CSC_MODE(pipe), mode);
@@ -645,14 +652,14 @@ void intel_color_init(struct drm_crtc *crtc)
                dev_priv->display.load_csc_matrix = cherryview_load_csc_matrix;
                dev_priv->display.load_luts = cherryview_load_luts;
        } else if (IS_HASWELL(dev_priv)) {
-               dev_priv->display.load_csc_matrix = i9xx_load_csc_matrix;
+               dev_priv->display.load_csc_matrix = ilk_load_csc_matrix;
                dev_priv->display.load_luts = haswell_load_luts;
        } else if (IS_BROADWELL(dev_priv) || IS_GEN9_BC(dev_priv) ||
                   IS_BROXTON(dev_priv)) {
-               dev_priv->display.load_csc_matrix = i9xx_load_csc_matrix;
+               dev_priv->display.load_csc_matrix = ilk_load_csc_matrix;
                dev_priv->display.load_luts = broadwell_load_luts;
        } else if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
-               dev_priv->display.load_csc_matrix = i9xx_load_csc_matrix;
+               dev_priv->display.load_csc_matrix = ilk_load_csc_matrix;
                dev_priv->display.load_luts = glk_load_luts;
        } else {
                dev_priv->display.load_luts = i9xx_load_luts;