]> asedeno.scripts.mit.edu Git - linux.git/blobdiff - drivers/gpu/drm/i915/intel_sideband.c
drm/i915: switch intel_wait_for_register to uncore
[linux.git] / drivers / gpu / drm / i915 / intel_sideband.c
index 75c872bb8cc9d3fe0d9a0b19d1240035ff06fa4e..57de41b1f9892dd3582108413d9547a07a472e55 100644 (file)
@@ -51,7 +51,7 @@ static int vlv_sideband_rw(struct drm_i915_private *dev_priv, u32 devfn,
 
        WARN_ON(!mutex_is_locked(&dev_priv->sb_lock));
 
-       if (intel_wait_for_register(dev_priv,
+       if (intel_wait_for_register(&dev_priv->uncore,
                                    VLV_IOSF_DOORBELL_REQ, IOSF_SB_BUSY, 0,
                                    5)) {
                DRM_DEBUG_DRIVER("IOSF sideband idle wait (%s) timed out\n",
@@ -63,7 +63,7 @@ static int vlv_sideband_rw(struct drm_i915_private *dev_priv, u32 devfn,
        I915_WRITE(VLV_IOSF_DATA, is_read ? 0 : *val);
        I915_WRITE(VLV_IOSF_DOORBELL_REQ, cmd);
 
-       if (intel_wait_for_register(dev_priv,
+       if (intel_wait_for_register(&dev_priv->uncore,
                                    VLV_IOSF_DOORBELL_REQ, IOSF_SB_BUSY, 0,
                                    5)) {
                DRM_DEBUG_DRIVER("IOSF sideband finish wait (%s) timed out\n",
@@ -208,7 +208,7 @@ u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
        u32 value = 0;
        WARN_ON(!mutex_is_locked(&dev_priv->sb_lock));
 
-       if (intel_wait_for_register(dev_priv,
+       if (intel_wait_for_register(&dev_priv->uncore,
                                    SBI_CTL_STAT, SBI_BUSY, 0,
                                    100)) {
                DRM_ERROR("timeout waiting for SBI to become ready\n");
@@ -224,7 +224,7 @@ u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
                value = SBI_CTL_DEST_MPHY | SBI_CTL_OP_IORD;
        I915_WRITE(SBI_CTL_STAT, value | SBI_BUSY);
 
-       if (intel_wait_for_register(dev_priv,
+       if (intel_wait_for_register(&dev_priv->uncore,
                                    SBI_CTL_STAT,
                                    SBI_BUSY,
                                    0,
@@ -248,7 +248,7 @@ void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
 
        WARN_ON(!mutex_is_locked(&dev_priv->sb_lock));
 
-       if (intel_wait_for_register(dev_priv,
+       if (intel_wait_for_register(&dev_priv->uncore,
                                    SBI_CTL_STAT, SBI_BUSY, 0,
                                    100)) {
                DRM_ERROR("timeout waiting for SBI to become ready\n");
@@ -264,7 +264,7 @@ void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
                tmp = SBI_CTL_DEST_MPHY | SBI_CTL_OP_IOWR;
        I915_WRITE(SBI_CTL_STAT, SBI_BUSY | tmp);
 
-       if (intel_wait_for_register(dev_priv,
+       if (intel_wait_for_register(&dev_priv->uncore,
                                    SBI_CTL_STAT,
                                    SBI_BUSY,
                                    0,