drm/i915/selftests: recreate WA lists inside the selftest

[linux.git] / drivers / gpu / drm / i915 / selftests / intel_workarounds.c

diff --git a/drivers/gpu/drm/i915/selftests/intel_workarounds.c b/drivers/gpu/drm/i915/selftests/intel_workarounds.c
index c2b3cd8fcc3446a5cad7223c527860d2d8455c46..8b3f3200a3bd9e8caf17f88d537e9e75c23ca81e 100644 (file)
--- a/drivers/gpu/drm/i915/selftests/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/selftests/intel_workarounds.c
@@ -12,6 +12,51 @@
 #include "igt_wedge_me.h"
 #include "mock_context.h"
 
+#define REF_NAME_MAX (INTEL_ENGINE_CS_MAX_NAME + 4)
+struct wa_lists {
+       struct i915_wa_list gt_wa_list;
+       struct {
+               char name[REF_NAME_MAX];
+               struct i915_wa_list wa_list;
+       } engine[I915_NUM_ENGINES];
+};
+
+static void
+reference_lists_init(struct drm_i915_private *i915, struct wa_lists *lists)
+{
+       struct intel_engine_cs *engine;
+       enum intel_engine_id id;
+
+       memset(lists, 0, sizeof(*lists));
+
+       wa_init_start(&lists->gt_wa_list, "GT_REF");
+       gt_init_workarounds(i915, &lists->gt_wa_list);
+       wa_init_finish(&lists->gt_wa_list);
+
+       for_each_engine(engine, i915, id) {
+               struct i915_wa_list *wal = &lists->engine[id].wa_list;
+               char *name = lists->engine[id].name;
+
+               snprintf(name, REF_NAME_MAX, "%s_REF", engine->name);
+
+               wa_init_start(wal, name);
+               engine_init_workarounds(engine, wal);
+               wa_init_finish(wal);
+       }
+}
+
+static void
+reference_lists_fini(struct drm_i915_private *i915, struct wa_lists *lists)
+{
+       struct intel_engine_cs *engine;
+       enum intel_engine_id id;
+
+       for_each_engine(engine, i915, id)
+               intel_wa_list_free(&lists->engine[id].wa_list);
+
+       intel_wa_list_free(&lists->gt_wa_list);
+}
+
 static struct drm_i915_gem_object *
 read_nonprivs(struct i915_gem_context *ctx, struct intel_engine_cs *engine)
 {
@@ -326,15 +371,17 @@ static int live_reset_whitelist(void *arg)
        return err;
 }
 
-static bool verify_gt_engine_wa(struct drm_i915_private *i915, const char *str)
+static bool verify_gt_engine_wa(struct drm_i915_private *i915,
+                               struct wa_lists *lists, const char *str)
 {
        struct intel_engine_cs *engine;
        enum intel_engine_id id;
        bool ok = true;
 
-       ok &= intel_gt_verify_workarounds(i915, str);
+       ok &= wa_list_verify(i915, &lists->gt_wa_list, str);
+
        for_each_engine(engine, i915, id)
-               ok &= intel_engine_verify_workarounds(engine, str);
+               ok &= wa_list_verify(i915, &lists->engine[id].wa_list, str);
 
        return ok;
 }
@@ -344,6 +391,7 @@ live_gpu_reset_gt_engine_workarounds(void *arg)
 {
        struct drm_i915_private *i915 = arg;
        struct i915_gpu_error *error = &i915->gpu_error;
+       struct wa_lists lists;
        bool ok;
 
        if (!intel_has_gpu_reset(i915))
@@ -353,17 +401,19 @@ live_gpu_reset_gt_engine_workarounds(void *arg)
 
        igt_global_reset_lock(i915);
        intel_runtime_pm_get(i915);
+       reference_lists_init(i915, &lists);
 
-       ok = verify_gt_engine_wa(i915, "before reset");
+       ok = verify_gt_engine_wa(i915, &lists, "before reset");
        if (!ok)
                goto out;
 
        set_bit(I915_RESET_HANDOFF, &error->flags);
        i915_reset(i915, ALL_ENGINES, "live_workarounds");
 
-       ok = verify_gt_engine_wa(i915, "after reset");
+       ok = verify_gt_engine_wa(i915, &lists, "after reset");
 
 out:
+       reference_lists_fini(i915, &lists);
        intel_runtime_pm_put(i915);
        igt_global_reset_unlock(i915);
 
@@ -379,6 +429,7 @@ live_engine_reset_gt_engine_workarounds(void *arg)
        struct igt_spinner spin;
        enum intel_engine_id id;
        struct i915_request *rq;
+       struct wa_lists lists;
        int ret = 0;
 
        if (!intel_has_reset_engine(i915))
@@ -390,13 +441,14 @@ live_engine_reset_gt_engine_workarounds(void *arg)
 
        igt_global_reset_lock(i915);
        intel_runtime_pm_get(i915);
+       reference_lists_init(i915, &lists);
 
        for_each_engine(engine, i915, id) {
                bool ok;
 
                pr_info("Verifying after %s reset...\n", engine->name);
 
-               ok = verify_gt_engine_wa(i915, "before reset");
+               ok = verify_gt_engine_wa(i915, &lists, "before reset");
                if (!ok) {
                        ret = -ESRCH;
                        goto err;
@@ -404,7 +456,7 @@ live_engine_reset_gt_engine_workarounds(void *arg)
 
                i915_reset_engine(engine, "live_workarounds");
 
-               ok = verify_gt_engine_wa(i915, "after idle reset");
+               ok = verify_gt_engine_wa(i915, &lists, "after idle reset");
                if (!ok) {
                        ret = -ESRCH;
                        goto err;
@@ -435,7 +487,7 @@ live_engine_reset_gt_engine_workarounds(void *arg)
                igt_spinner_end(&spin);
                igt_spinner_fini(&spin);
 
-               ok = verify_gt_engine_wa(i915, "after busy reset");
+               ok = verify_gt_engine_wa(i915, &lists, "after busy reset");
                if (!ok) {
                        ret = -ESRCH;
                        goto err;
@@ -443,6 +495,7 @@ live_engine_reset_gt_engine_workarounds(void *arg)
        }
 
 err:
+       reference_lists_fini(i915, &lists);
        intel_runtime_pm_put(i915);
        igt_global_reset_unlock(i915);
        kernel_context_close(ctx);