drm/nouveau/kms/nv50-: disable input lut harder

[linux.git] / drivers / gpu / drm / nouveau / dispnv50 / wndw.c

diff --git a/drivers/gpu/drm/nouveau/dispnv50/wndw.c b/drivers/gpu/drm/nouveau/dispnv50/wndw.c
index 283ff690350ea76ee20fe7db1beda003631f4be2..0aaa7e0013f61c8705487dcdb6edf3c6fa038893 100644 (file)
--- a/drivers/gpu/drm/nouveau/dispnv50/wndw.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/wndw.c
@@ -26,6 +26,8 @@
 #include <nvif/cl0002.h>
 
 #include <drm/drm_atomic_helper.h>
+#include <drm/drm_fourcc.h>
+
 #include "nouveau_bo.h"
 
 static void
@@ -320,7 +322,9 @@ nv50_wndw_atomic_check_lut(struct nv50_wndw *wndw,
                asyh->wndw.olut &= ~BIT(wndw->id);
        }
 
-       if (!ilut && wndw->func->ilut_identity) {
+       if (!ilut && wndw->func->ilut_identity &&
+           asyw->state.fb->format->format != DRM_FORMAT_XBGR16161616F &&
+           asyw->state.fb->format->format != DRM_FORMAT_ABGR16161616F) {
                static struct drm_property_blob dummy = {};
                ilut = &dummy;
        }
@@ -332,6 +336,8 @@ nv50_wndw_atomic_check_lut(struct nv50_wndw *wndw,
                asyw->xlut.handle = wndw->wndw.vram.handle;
                asyw->xlut.i.buffer = !asyw->xlut.i.buffer;
                asyw->set.xlut = true;
+       } else {
+               asyw->clr.xlut = armw->xlut.handle != 0;
        }
 
        /* Handle setting base SET_OUTPUT_LUT_LO_ENABLE_USE_CORE_LUT. */
@@ -457,7 +463,7 @@ nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state)
                asyw->image.handle[0] = ctxdma->object.handle;
        }
 
-       asyw->state.fence = reservation_object_get_excl_rcu(fb->nvbo->bo.resv);
+       asyw->state.fence = dma_resv_get_excl_rcu(fb->nvbo->bo.base.resv);
        asyw->image.offset[0] = fb->nvbo->bo.offset;
 
        if (wndw->func->prepare) {