Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6

[linux.git] / drivers / iommu / Kconfig

diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index 0b9d78a0f3aca9bdb1d06acf08249b8606f652fc..d2fade984999776edbfe361ff457fce862abb97a 100644 (file)
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -82,7 +82,7 @@ config IOMMU_DEBUGFS
 config IOMMU_DEFAULT_PASSTHROUGH
        bool "IOMMU passthrough by default"
        depends on IOMMU_API
-        help
+       help
          Enable passthrough by default, removing the need to pass in
          iommu.passthrough=on or iommu=pt through command line. If this
          is enabled, you can still disable with iommu.passthrough=off
@@ -91,8 +91,8 @@ config IOMMU_DEFAULT_PASSTHROUGH
          If unsure, say N here.
 
 config OF_IOMMU
-       def_bool y
-       depends on OF && IOMMU_API
+       def_bool y
+       depends on OF && IOMMU_API
 
 # IOMMU-agnostic DMA-mapping layer
 config IOMMU_DMA
@@ -214,6 +214,7 @@ config INTEL_IOMMU_SVM
        select PCI_PASID
        select PCI_PRI
        select MMU_NOTIFIER
+       select IOASID
        help
          Shared Virtual Memory (SVM) provides a facility for devices
          to access DMA resources through process address space by
@@ -248,6 +249,18 @@ config INTEL_IOMMU_FLOPPY_WA
          workaround will setup a 1:1 mapping for the first
          16MiB to make floppy (an ISA device) work.
 
+config INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON
+       bool "Enable Intel IOMMU scalable mode by default"
+       depends on INTEL_IOMMU
+       help
+         Selecting this option will enable by default the scalable mode if
+         hardware presents the capability. The scalable mode is defined in
+         VT-d 3.0. The scalable mode capability could be checked by reading
+         /sys/devices/virtual/iommu/dmar*/intel-iommu/ecap. If this option
+         is not selected, scalable mode support could also be enabled by
+         passing intel_iommu=sm_on to the kernel. If not sure, please use
+         the default value.
+
 config IRQ_REMAP
        bool "Support for Interrupt Remapping"
        depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
@@ -356,7 +369,7 @@ config SPAPR_TCE_IOMMU
 
 # ARM IOMMU support
 config ARM_SMMU
-       bool "ARM Ltd. System MMU (SMMU) Support"
+       tristate "ARM Ltd. System MMU (SMMU) Support"
        depends on (ARM64 || ARM) && MMU
        select IOMMU_API
        select IOMMU_IO_PGTABLE_LPAE
@@ -368,6 +381,18 @@ config ARM_SMMU
          Say Y here if your SoC includes an IOMMU device implementing
          the ARM SMMU architecture.
 
+config ARM_SMMU_LEGACY_DT_BINDINGS
+       bool "Support the legacy \"mmu-masters\" devicetree bindings"
+       depends on ARM_SMMU=y && OF
+       help
+         Support for the badly designed and deprecated "mmu-masters"
+         devicetree bindings. This allows some DMA masters to attach
+         to the SMMU but does not provide any support via the DMA API.
+         If you're lucky, you might be able to get VFIO up and running.
+
+         If you say Y here then you'll make me very sad. Instead, say N
+         and move your firmware to the utopian future that was 2016.
+
 config ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT
        bool "Default to disabling bypass on ARM SMMU v1 and v2"
        depends on ARM_SMMU
@@ -394,7 +419,7 @@ config ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT
          config.
 
 config ARM_SMMU_V3
-       bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support"
+       tristate "ARM Ltd. System MMU Version 3 (SMMUv3) Support"
        depends on ARM64
        select IOMMU_API
        select IOMMU_IO_PGTABLE_LPAE