irqchip/gic: Rework gic_configure_irq to take the full ICFGR base

[linux.git] / drivers / irqchip / irq-gic-common.c

diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c
index b0a8215a13fc086958932f96557d1c1113022c40..6900b6f0921cfaebaf390dc6ffb1dc3c691c8163 100644 (file)
--- a/drivers/irqchip/irq-gic-common.c
+++ b/drivers/irqchip/irq-gic-common.c
@@ -63,7 +63,7 @@ int gic_configure_irq(unsigned int irq, unsigned int type,
         * for "irq", depending on "type".
         */
        raw_spin_lock_irqsave(&irq_controller_lock, flags);
-       val = oldval = readl_relaxed(base + GIC_DIST_CONFIG + confoff);
+       val = oldval = readl_relaxed(base + confoff);
        if (type & IRQ_TYPE_LEVEL_MASK)
                val &= ~confmask;
        else if (type & IRQ_TYPE_EDGE_BOTH)
@@ -83,14 +83,10 @@ int gic_configure_irq(unsigned int irq, unsigned int type,
         * does not allow us to set the configuration or we are in a
         * non-secure mode, and hence it may not be catastrophic.
         */
-       writel_relaxed(val, base + GIC_DIST_CONFIG + confoff);
-       if (readl_relaxed(base + GIC_DIST_CONFIG + confoff) != val) {
-               if (WARN_ON(irq >= 32))
-                       ret = -EINVAL;
-               else
-                       pr_warn("GIC: PPI%d is secure or misconfigured\n",
-                               irq - 16);
-       }
+       writel_relaxed(val, base + confoff);
+       if (readl_relaxed(base + confoff) != val)
+               ret = -EINVAL;
+
        raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
 
        if (sync_access)