ice: Add support for dynamic interrupt moderation

[linux.git] / drivers / net / ethernet / intel / ice / ice_txrx.h

diff --git a/drivers/net/ethernet/intel/ice/ice_txrx.h b/drivers/net/ethernet/intel/ice/ice_txrx.h
index 839fd9ff604341f0d7e8cab9ec4408ab62cd1e88..a9b92974e041e37042673068c9e7aadc8b2082cd 100644 (file)
--- a/drivers/net/ethernet/intel/ice/ice_txrx.h
+++ b/drivers/net/ethernet/intel/ice/ice_txrx.h
@@ -104,10 +104,16 @@ enum ice_rx_dtype {
 #define ICE_RX_ITR     ICE_IDX_ITR0
 #define ICE_TX_ITR     ICE_IDX_ITR1
 #define ICE_ITR_DYNAMIC        0x8000  /* use top bit as a flag */
-#define ICE_ITR_8K     0x003E
+#define ICE_ITR_8K     125
+#define ICE_DFLT_TX_ITR        ICE_ITR_8K
+#define ICE_DFLT_RX_ITR        ICE_ITR_8K
+/* apply ITR granularity translation to program the register. itr_gran is either
+ * 2 or 4 usecs so we need to divide by 2 first then shift by that value
+ */
+#define ITR_TO_REG(val, itr_gran) (((val) & ~ICE_ITR_DYNAMIC) >> \
+                                  ((itr_gran) / 2))
 
-/* apply ITR HW granularity translation to program the HW registers */
-#define ITR_TO_REG(val, itr_gran) (((val) & ~ICE_ITR_DYNAMIC) >> (itr_gran))
+#define ICE_DFLT_INTRL 0
 
 /* Legacy or Advanced Mode Queue */
 #define ICE_TX_ADVANCED        0
@@ -130,12 +136,11 @@ struct ice_ring {
        u32 txq_teid;                   /* Added Tx queue TEID */
 
        /* high bit set means dynamic, use accessor routines to read/write.
-        * hardware supports 2us/1us resolution for the ITR registers.
+        * hardware supports 4us/2us resolution for the ITR registers.
         * these values always store the USER setting, and must be converted
         * before programming to a register.
         */
-       u16 rx_itr_setting;
-       u16 tx_itr_setting;
+       u16 itr_setting;
 
        u16 count;                      /* Number of descriptors */
        u16 reg_idx;                    /* HW register index of the ring */