octeontx2-af: Support fixed transmit scheduler topology

[linux.git] / drivers / net / ethernet / marvell / octeontx2 / af / mbox.h

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index de3fe2559a3cf498e72366f1040880bf989314a6..fc9c731856d2f04dbc7b22fc597d22f9c31830c6 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -127,6 +127,7 @@ M(ATTACH_RESOURCES, 0x002, attach_resources, rsrc_attach, msg_rsp)  \
 M(DETACH_RESOURCES,    0x003, detach_resources, rsrc_detach, msg_rsp)  \
 M(MSIX_OFFSET,         0x004, msix_offset, msg_req, msix_offset_rsp)   \
 M(VF_FLR,              0x006, vf_flr, msg_req, msg_rsp)                \
+M(GET_HW_CAP,          0x008, get_hw_cap, msg_req, get_hw_cap_rsp)     \
 /* CGX mbox IDs (range 0x200 - 0x3FF) */                               \
 M(CGX_START_RXTX,      0x200, cgx_start_rxtx, msg_req, msg_rsp)        \
 M(CGX_STOP_RXTX,       0x201, cgx_stop_rxtx, msg_req, msg_rsp)         \
@@ -302,6 +303,12 @@ struct msix_offset_rsp {
        u16  cptlf_msixoff[MAX_RVU_BLKLF_CNT];
 };
 
+struct get_hw_cap_rsp {
+       struct mbox_msghdr hdr;
+       u8 nix_fixed_txschq_mapping; /* Schq mapping fixed or flexible */
+       u8 nix_shaping;              /* Is shaping and coloring supported */
+};
+
 /* CGX mbox message formats */
 
 struct cgx_stats_rsp {
@@ -514,6 +521,9 @@ struct nix_txsch_alloc_rsp {
        /* Scheduler queue list allocated at each level */
        u16 schq_contig_list[NIX_TXSCH_LVL_CNT][MAX_TXSCHQ_PER_FUNC];
        u16 schq_list[NIX_TXSCH_LVL_CNT][MAX_TXSCHQ_PER_FUNC];
+       u8  aggr_level; /* Traffic aggregation scheduler level */
+       u8  aggr_lvl_rr_prio; /* Aggregation lvl's RR_PRIO config */
+       u8  link_cfg_lvl; /* LINKX_CFG CSRs mapped to TL3 or TL2's index ? */
 };
 
 struct nix_txsch_free_req {