Merge branches 'pm-core', 'pm-qos', 'pm-domains' and 'pm-opp'

[linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / main.c

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c
index ada24e103b02ac927362b0aba5050c251a0e644b..3c315eb8d270f6f94ecaea2c8ee4d78ed1244658 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c
@@ -174,6 +174,41 @@ static int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili)
        return err;
 }
 
+static void mlx5_set_driver_version(struct mlx5_core_dev *dev)
+{
+       int driver_ver_sz = MLX5_FLD_SZ_BYTES(set_driver_version_in,
+                                             driver_version);
+       u8 in[MLX5_ST_SZ_BYTES(set_driver_version_in)] = {0};
+       u8 out[MLX5_ST_SZ_BYTES(set_driver_version_out)] = {0};
+       int remaining_size = driver_ver_sz;
+       char *string;
+
+       if (!MLX5_CAP_GEN(dev, driver_version))
+               return;
+
+       string = MLX5_ADDR_OF(set_driver_version_in, in, driver_version);
+
+       strncpy(string, "Linux", remaining_size);
+
+       remaining_size = max_t(int, 0, driver_ver_sz - strlen(string));
+       strncat(string, ",", remaining_size);
+
+       remaining_size = max_t(int, 0, driver_ver_sz - strlen(string));
+       strncat(string, DRIVER_NAME, remaining_size);
+
+       remaining_size = max_t(int, 0, driver_ver_sz - strlen(string));
+       strncat(string, ",", remaining_size);
+
+       remaining_size = max_t(int, 0, driver_ver_sz - strlen(string));
+       strncat(string, DRIVER_VERSION, remaining_size);
+
+       /*Send the command*/
+       MLX5_SET(set_driver_version_in, in, opcode,
+                MLX5_CMD_OP_SET_DRIVER_VERSION);
+
+       mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
+}
+
 static int set_dma_caps(struct pci_dev *pdev)
 {
        int err;
@@ -468,6 +503,13 @@ static int handle_hca_cap(struct mlx5_core_dev *dev)
        MLX5_SET(cmd_hca_cap, set_hca_cap, pkey_table_size,
                 to_fw_pkey_sz(dev, 128));
 
+       /* Check log_max_qp from HCA caps to set in current profile */
+       if (MLX5_CAP_GEN_MAX(dev, log_max_qp) < profile[prof_sel].log_max_qp) {
+               mlx5_core_warn(dev, "log_max_qp value in current profile is %d, changing it to HCA capability limit (%d)\n",
+                              profile[prof_sel].log_max_qp,
+                              MLX5_CAP_GEN_MAX(dev, log_max_qp));
+               profile[prof_sel].log_max_qp = MLX5_CAP_GEN_MAX(dev, log_max_qp);
+       }
        if (prof->mask & MLX5_PROF_MASK_QP_SIZE)
                MLX5_SET(cmd_hca_cap, set_hca_cap, log_max_qp,
                         prof->log_max_qp);
@@ -522,7 +564,7 @@ int mlx5_core_disable_hca(struct mlx5_core_dev *dev, u16 func_id)
        return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
 }
 
-cycle_t mlx5_read_internal_timer(struct mlx5_core_dev *dev)
+u64 mlx5_read_internal_timer(struct mlx5_core_dev *dev)
 {
        u32 timer_h, timer_h1, timer_l;
 
@@ -532,7 +574,7 @@ cycle_t mlx5_read_internal_timer(struct mlx5_core_dev *dev)
        if (timer_h != timer_h1) /* wrap around */
                timer_l = ioread32be(&dev->iseg->internal_timer_l);
 
-       return (cycle_t)timer_l | (cycle_t)timer_h1 << 32;
+       return (u64)timer_l | (u64)timer_h1 << 32;
 }
 
 static int mlx5_irq_set_affinity_hint(struct mlx5_core_dev *mdev, int i)
@@ -540,7 +582,6 @@ static int mlx5_irq_set_affinity_hint(struct mlx5_core_dev *mdev, int i)
        struct mlx5_priv *priv  = &mdev->priv;
        struct msix_entry *msix = priv->msix_arr;
        int irq                 = msix[i + MLX5_EQ_VEC_COMP_BASE].vector;
-       int numa_node           = priv->numa_node;
        int err;
 
        if (!zalloc_cpumask_var(&priv->irq_info[i].mask, GFP_KERNEL)) {
@@ -548,7 +589,7 @@ static int mlx5_irq_set_affinity_hint(struct mlx5_core_dev *mdev, int i)
                return -ENOMEM;
        }
 
-       cpumask_set_cpu(cpumask_local_spread(i, numa_node),
+       cpumask_set_cpu(cpumask_local_spread(i, priv->numa_node),
                        priv->irq_info[i].mask);
 
        err = irq_set_affinity_hint(irq, priv->irq_info[i].mask);
@@ -766,7 +807,7 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev)
                return 0;
        }
 
-       return -ENOTSUPP;
+       return -EOPNOTSUPP;
 }
 
 
@@ -1017,6 +1058,8 @@ static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv,
                goto err_pagealloc_stop;
        }
 
+       mlx5_set_driver_version(dev);
+
        mlx5_start_health_poll(dev);
 
        err = mlx5_query_hca_caps(dev);
@@ -1152,6 +1195,9 @@ static int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv,
 {
        int err = 0;
 
+       if (cleanup)
+               mlx5_drain_health_wq(dev);
+
        mutex_lock(&dev->intf_state_mutex);
        if (test_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state)) {
                dev_warn(&dev->pdev->dev, "%s: interface is down, NOP\n",
@@ -1204,6 +1250,8 @@ static const struct devlink_ops mlx5_devlink_ops = {
 #ifdef CONFIG_MLX5_CORE_EN
        .eswitch_mode_set = mlx5_devlink_eswitch_mode_set,
        .eswitch_mode_get = mlx5_devlink_eswitch_mode_get,
+       .eswitch_inline_mode_set = mlx5_devlink_eswitch_inline_mode_set,
+       .eswitch_inline_mode_get = mlx5_devlink_eswitch_inline_mode_get,
 #endif
 };
 
@@ -1312,7 +1360,7 @@ static pci_ers_result_t mlx5_pci_err_detected(struct pci_dev *pdev,
 
        mlx5_enter_error_state(dev);
        mlx5_unload_one(dev, priv, false);
-       /* In case of kernel call save the pci state and drain health wq */
+       /* In case of kernel call save the pci state and drain the health wq */
        if (state) {
                pci_save_state(pdev);
                mlx5_drain_health_wq(dev);
@@ -1419,6 +1467,7 @@ static const struct pci_device_id mlx5_core_pci_table[] = {
        { PCI_VDEVICE(MELLANOX, 0x1017) },                      /* ConnectX-5, PCIe 3.0 */
        { PCI_VDEVICE(MELLANOX, 0x1018), MLX5_PCI_DEV_IS_VF},   /* ConnectX-5 VF */
        { PCI_VDEVICE(MELLANOX, 0x1019) },                      /* ConnectX-5, PCIe 4.0 */
+       { PCI_VDEVICE(MELLANOX, 0x101a), MLX5_PCI_DEV_IS_VF},   /* ConnectX-5, PCIe 4.0 VF */
        { 0, }
 };