Merge tag 'for-linus-5.6-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git...

[linux.git] / drivers / pci / quirks.c

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 1ca383f7ece612bea445936108a6bf353546dafd..29f473ebf20f0b20e9df8e9f0f6d889d361cb887 100644 (file)
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1571,7 +1571,7 @@ static void asus_hides_smbus_lpc_ich6_suspend(struct pci_dev *dev)
 
        pci_read_config_dword(dev, 0xF0, &rcba);
        /* use bits 31:14, 16 kB aligned */
-       asus_rcba_base = ioremap_nocache(rcba & 0xFFFFC000, 0x4000);
+       asus_rcba_base = ioremap(rcba & 0xFFFFC000, 0x4000);
        if (asus_rcba_base == NULL)
                return;
 }
@@ -3927,7 +3927,7 @@ int pci_dev_specific_reset(struct pci_dev *dev, int probe)
 static void quirk_dma_func0_alias(struct pci_dev *dev)
 {
        if (PCI_FUNC(dev->devfn) != 0)
-               pci_add_dma_alias(dev, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
+               pci_add_dma_alias(dev, PCI_DEVFN(PCI_SLOT(dev->devfn), 0), 1);
 }
 
 /*
@@ -3941,7 +3941,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_RICOH, 0xe476, quirk_dma_func0_alias);
 static void quirk_dma_func1_alias(struct pci_dev *dev)
 {
        if (PCI_FUNC(dev->devfn) != 1)
-               pci_add_dma_alias(dev, PCI_DEVFN(PCI_SLOT(dev->devfn), 1));
+               pci_add_dma_alias(dev, PCI_DEVFN(PCI_SLOT(dev->devfn), 1), 1);
 }
 
 /*
@@ -4026,7 +4026,7 @@ static void quirk_fixed_dma_alias(struct pci_dev *dev)
 
        id = pci_match_id(fixed_dma_alias_tbl, dev);
        if (id)
-               pci_add_dma_alias(dev, id->driver_data);
+               pci_add_dma_alias(dev, id->driver_data, 1);
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ADAPTEC2, 0x0285, quirk_fixed_dma_alias);
 
@@ -4067,9 +4067,9 @@ DECLARE_PCI_FIXUP_HEADER(0x8086, 0x244e, quirk_use_pcie_bridge_dma_alias);
  */
 static void quirk_mic_x200_dma_alias(struct pci_dev *pdev)
 {
-       pci_add_dma_alias(pdev, PCI_DEVFN(0x10, 0x0));
-       pci_add_dma_alias(pdev, PCI_DEVFN(0x11, 0x0));
-       pci_add_dma_alias(pdev, PCI_DEVFN(0x12, 0x3));
+       pci_add_dma_alias(pdev, PCI_DEVFN(0x10, 0x0), 1);
+       pci_add_dma_alias(pdev, PCI_DEVFN(0x11, 0x0), 1);
+       pci_add_dma_alias(pdev, PCI_DEVFN(0x12, 0x3), 1);
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2260, quirk_mic_x200_dma_alias);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2264, quirk_mic_x200_dma_alias);
@@ -4093,13 +4093,8 @@ static void quirk_pex_vca_alias(struct pci_dev *pdev)
        const unsigned int num_pci_slots = 0x20;
        unsigned int slot;
 
-       for (slot = 0; slot < num_pci_slots; slot++) {
-               pci_add_dma_alias(pdev, PCI_DEVFN(slot, 0x0));
-               pci_add_dma_alias(pdev, PCI_DEVFN(slot, 0x1));
-               pci_add_dma_alias(pdev, PCI_DEVFN(slot, 0x2));
-               pci_add_dma_alias(pdev, PCI_DEVFN(slot, 0x3));
-               pci_add_dma_alias(pdev, PCI_DEVFN(slot, 0x4));
-       }
+       for (slot = 0; slot < num_pci_slots; slot++)
+               pci_add_dma_alias(pdev, PCI_DEVFN(slot, 0x0), 5);
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2954, quirk_pex_vca_alias);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2955, quirk_pex_vca_alias);
@@ -4779,7 +4774,7 @@ static int pci_quirk_enable_intel_lpc_acs(struct pci_dev *dev)
        if (!(rcba & INTEL_LPC_RCBA_ENABLE))
                return -EINVAL;
 
-       rcba_mem = ioremap_nocache(rcba & INTEL_LPC_RCBA_MASK,
+       rcba_mem = ioremap(rcba & INTEL_LPC_RCBA_MASK,
                                   PAGE_ALIGN(INTEL_UPDCR_REG));
        if (!rcba_mem)
                return -ENOMEM;
@@ -5069,18 +5064,25 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0422, quirk_no_ext_tags);
 
 #ifdef CONFIG_PCI_ATS
 /*
- * Some devices have a broken ATS implementation causing IOMMU stalls.
- * Don't use ATS for those devices.
+ * Some devices require additional driver setup to enable ATS.  Don't use
+ * ATS for those devices as ATS will be enabled before the driver has had a
+ * chance to load and configure the device.
  */
-static void quirk_no_ats(struct pci_dev *pdev)
+static void quirk_amd_harvest_no_ats(struct pci_dev *pdev)
 {
-       pci_info(pdev, "disabling ATS (broken on this device)\n");
+       if (pdev->device == 0x7340 && pdev->revision != 0xc5)
+               return;
+
+       pci_info(pdev, "disabling ATS\n");
        pdev->ats_cap = 0;
 }
 
 /* AMD Stoney platform GPU */
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x98e4, quirk_no_ats);
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x6900, quirk_no_ats);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x98e4, quirk_amd_harvest_no_ats);
+/* AMD Iceland dGPU */
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x6900, quirk_amd_harvest_no_ats);
+/* AMD Navi14 dGPU */
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7340, quirk_amd_harvest_no_ats);
 #endif /* CONFIG_PCI_ATS */
 
 /* Freescale PCIe doesn't support MSI in RC mode */
@@ -5327,7 +5329,7 @@ static void quirk_switchtec_ntb_dma_alias(struct pci_dev *pdev)
                        pci_dbg(pdev,
                                "Aliasing Partition %d Proxy ID %02x.%d\n",
                                pp, PCI_SLOT(devfn), PCI_FUNC(devfn));
-                       pci_add_dma_alias(pdev, devfn);
+                       pci_add_dma_alias(pdev, devfn, 1);
                }
        }
 
@@ -5368,6 +5370,39 @@ SWITCHTEC_QUIRK(0x8573);  /* PFXI 48XG3 */
 SWITCHTEC_QUIRK(0x8574);  /* PFXI 64XG3 */
 SWITCHTEC_QUIRK(0x8575);  /* PFXI 80XG3 */
 SWITCHTEC_QUIRK(0x8576);  /* PFXI 96XG3 */
+SWITCHTEC_QUIRK(0x4000);  /* PFX 100XG4 */
+SWITCHTEC_QUIRK(0x4084);  /* PFX 84XG4  */
+SWITCHTEC_QUIRK(0x4068);  /* PFX 68XG4  */
+SWITCHTEC_QUIRK(0x4052);  /* PFX 52XG4  */
+SWITCHTEC_QUIRK(0x4036);  /* PFX 36XG4  */
+SWITCHTEC_QUIRK(0x4028);  /* PFX 28XG4  */
+SWITCHTEC_QUIRK(0x4100);  /* PSX 100XG4 */
+SWITCHTEC_QUIRK(0x4184);  /* PSX 84XG4  */
+SWITCHTEC_QUIRK(0x4168);  /* PSX 68XG4  */
+SWITCHTEC_QUIRK(0x4152);  /* PSX 52XG4  */
+SWITCHTEC_QUIRK(0x4136);  /* PSX 36XG4  */
+SWITCHTEC_QUIRK(0x4128);  /* PSX 28XG4  */
+SWITCHTEC_QUIRK(0x4200);  /* PAX 100XG4 */
+SWITCHTEC_QUIRK(0x4284);  /* PAX 84XG4  */
+SWITCHTEC_QUIRK(0x4268);  /* PAX 68XG4  */
+SWITCHTEC_QUIRK(0x4252);  /* PAX 52XG4  */
+SWITCHTEC_QUIRK(0x4236);  /* PAX 36XG4  */
+SWITCHTEC_QUIRK(0x4228);  /* PAX 28XG4  */
+
+/*
+ * The PLX NTB uses devfn proxy IDs to move TLPs between NT endpoints.
+ * These IDs are used to forward responses to the originator on the other
+ * side of the NTB.  Alias all possible IDs to the NTB to permit access when
+ * the IOMMU is turned on.
+ */
+static void quirk_plx_ntb_dma_alias(struct pci_dev *pdev)
+{
+       pci_info(pdev, "Setting PLX NTB proxy ID aliases\n");
+       /* PLX NTB may use all 256 devfns */
+       pci_add_dma_alias(pdev, 0, 256);
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x87b0, quirk_plx_ntb_dma_alias);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x87b1, quirk_plx_ntb_dma_alias);
 
 /*
  * On Lenovo Thinkpad P50 SKUs with a Nvidia Quadro M1000M, the BIOS does