Merge branch 'i2c/for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

[linux.git] / drivers / thunderbolt / tb_regs.h

diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h
index faa14b3df83c95433fb9cc7dc0278a5c37f992ec..7ee45b73c7f74086f965fc81f854d8f64af75c8c 100644 (file)
--- a/drivers/thunderbolt/tb_regs.h
+++ b/drivers/thunderbolt/tb_regs.h
@@ -220,6 +220,23 @@ struct tb_regs_port_header {
 #define ADP_CS_5_LCA_MASK                      GENMASK(28, 22)
 #define ADP_CS_5_LCA_SHIFT                     22
 
+/* Lane adapter registers */
+#define LANE_ADP_CS_0                          0x00
+#define LANE_ADP_CS_0_SUPPORTED_WIDTH_MASK     GENMASK(25, 20)
+#define LANE_ADP_CS_0_SUPPORTED_WIDTH_SHIFT    20
+#define LANE_ADP_CS_1                          0x01
+#define LANE_ADP_CS_1_TARGET_WIDTH_MASK                GENMASK(9, 4)
+#define LANE_ADP_CS_1_TARGET_WIDTH_SHIFT       4
+#define LANE_ADP_CS_1_TARGET_WIDTH_SINGLE      0x1
+#define LANE_ADP_CS_1_TARGET_WIDTH_DUAL                0x3
+#define LANE_ADP_CS_1_LB                       BIT(15)
+#define LANE_ADP_CS_1_CURRENT_SPEED_MASK       GENMASK(19, 16)
+#define LANE_ADP_CS_1_CURRENT_SPEED_SHIFT      16
+#define LANE_ADP_CS_1_CURRENT_SPEED_GEN2       0x8
+#define LANE_ADP_CS_1_CURRENT_SPEED_GEN3       0x4
+#define LANE_ADP_CS_1_CURRENT_WIDTH_MASK       GENMASK(25, 20)
+#define LANE_ADP_CS_1_CURRENT_WIDTH_SHIFT      20
+
 /* Display Port adapter registers */
 #define ADP_DP_CS_0                            0x00
 #define ADP_DP_CS_0_VIDEO_HOPID_MASK           GENMASK(26, 16)
@@ -235,6 +252,26 @@ struct tb_regs_port_header {
 #define ADP_DP_CS_3_HDPC                       BIT(9)
 #define DP_LOCAL_CAP                           0x04
 #define DP_REMOTE_CAP                          0x05
+#define DP_STATUS_CTRL                         0x06
+#define DP_STATUS_CTRL_CMHS                    BIT(25)
+#define DP_STATUS_CTRL_UF                      BIT(26)
+#define DP_COMMON_CAP                          0x07
+/*
+ * DP_COMMON_CAP offsets work also for DP_LOCAL_CAP and DP_REMOTE_CAP
+ * with exception of DPRX done.
+ */
+#define DP_COMMON_CAP_RATE_MASK                        GENMASK(11, 8)
+#define DP_COMMON_CAP_RATE_SHIFT               8
+#define DP_COMMON_CAP_RATE_RBR                 0x0
+#define DP_COMMON_CAP_RATE_HBR                 0x1
+#define DP_COMMON_CAP_RATE_HBR2                        0x2
+#define DP_COMMON_CAP_RATE_HBR3                        0x3
+#define DP_COMMON_CAP_LANES_MASK               GENMASK(14, 12)
+#define DP_COMMON_CAP_LANES_SHIFT              12
+#define DP_COMMON_CAP_1_LANE                   0x0
+#define DP_COMMON_CAP_2_LANES                  0x1
+#define DP_COMMON_CAP_4_LANES                  0x2
+#define DP_COMMON_CAP_DPRX_DONE                        BIT(31)
 
 /* PCIe adapter registers */
 #define ADP_PCIE_CS_0                          0x00
@@ -275,8 +312,17 @@ struct tb_regs_hop {
 #define TB_LC_DESC_PORT_SIZE_SHIFT     16
 #define TB_LC_DESC_PORT_SIZE_MASK      GENMASK(27, 16)
 #define TB_LC_FUSE                     0x03
+#define TB_LC_SNK_ALLOCATION           0x10
+#define TB_LC_SNK_ALLOCATION_SNK0_MASK GENMASK(3, 0)
+#define TB_LC_SNK_ALLOCATION_SNK0_CM   0x1
+#define TB_LC_SNK_ALLOCATION_SNK1_SHIFT        4
+#define TB_LC_SNK_ALLOCATION_SNK1_MASK GENMASK(7, 4)
+#define TB_LC_SNK_ALLOCATION_SNK1_CM   0x1
 
 /* Link controller registers */
+#define TB_LC_PORT_ATTR                        0x8d
+#define TB_LC_PORT_ATTR_BE             BIT(12)
+
 #define TB_LC_SX_CTRL                  0x96
 #define TB_LC_SX_CTRL_L1C              BIT(16)
 #define TB_LC_SX_CTRL_L2C              BIT(20)