dt-bindings: reset: Fix typo in imx8mq resets

[linux.git] / include / dt-bindings / reset / imx8mq-reset.h

diff --git a/include/dt-bindings/reset/imx8mq-reset.h b/include/dt-bindings/reset/imx8mq-reset.h
index 57c592498aa065d335391ddecce7ed9430a4e50a..9a301082d361b71a0870edf9bbb68acf8489f840 100644 (file)
--- a/include/dt-bindings/reset/imx8mq-reset.h
+++ b/include/dt-bindings/reset/imx8mq-reset.h
@@ -31,33 +31,33 @@
 #define IMX8MQ_RESET_OTG2_PHY_RESET            20
 #define IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N     21
 #define IMX8MQ_RESET_MIPI_DSI_RESET_N          22
-#define IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N      23
-#define IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N      24
-#define IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N     25
+#define IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N      23
+#define IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N      24
+#define IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N     25
 #define IMX8MQ_RESET_PCIEPHY                   26
 #define IMX8MQ_RESET_PCIEPHY_PERST             27
 #define IMX8MQ_RESET_PCIE_CTRL_APPS_EN         28
 #define IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF    29
-#define IMX8MQ_RESET_HDMI_PHY_APB_RESET                30
+#define IMX8MQ_RESET_HDMI_PHY_APB_RESET                30      /* i.MX8MM does NOT support */
 #define IMX8MQ_RESET_DISP_RESET                        31
 #define IMX8MQ_RESET_GPU_RESET                 32
 #define IMX8MQ_RESET_VPU_RESET                 33
-#define IMX8MQ_RESET_PCIEPHY2                  34
-#define IMX8MQ_RESET_PCIEPHY2_PERST            35
-#define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN                36
-#define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF   37
-#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET      38
-#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET   39
-#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET       40
-#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET      41
-#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET   42
-#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET       43
+#define IMX8MQ_RESET_PCIEPHY2                  34      /* i.MX8MM does NOT support */
+#define IMX8MQ_RESET_PCIEPHY2_PERST            35      /* i.MX8MM does NOT support */
+#define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN                36      /* i.MX8MM does NOT support */
+#define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF   37      /* i.MX8MM does NOT support */
+#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET      38      /* i.MX8MM does NOT support */
+#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET   39      /* i.MX8MM does NOT support */
+#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET       40      /* i.MX8MM does NOT support */
+#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET      41      /* i.MX8MM does NOT support */
+#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET   42      /* i.MX8MM does NOT support */
+#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET       43      /* i.MX8MM does NOT support */
 #define IMX8MQ_RESET_DDRC1_PRST                        44
 #define IMX8MQ_RESET_DDRC1_CORE_RESET          45
 #define IMX8MQ_RESET_DDRC1_PHY_RESET           46
-#define IMX8MQ_RESET_DDRC2_PRST                        47
-#define IMX8MQ_RESET_DDRC2_CORE_RESET          48
-#define IMX8MQ_RESET_DDRC2_PHY_RESET           49
+#define IMX8MQ_RESET_DDRC2_PRST                        47      /* i.MX8MM does NOT support */
+#define IMX8MQ_RESET_DDRC2_CORE_RESET          48      /* i.MX8MM does NOT support */
+#define IMX8MQ_RESET_DDRC2_PHY_RESET           49      /* i.MX8MM does NOT support */
 
 #define IMX8MQ_RESET_NUM                       50