]> asedeno.scripts.mit.edu Git - linux.git/blobdiff - include/linux/switchtec.h
PCI/switchtec: Add Gen4 system info register support
[linux.git] / include / linux / switchtec.h
index e295515bc3f3aa1743f1af5d34f402c24763368d..d012520e5cc5c2b78fbc2efe3b8dfec637a8f7ad 100644 (file)
@@ -32,6 +32,11 @@ enum {
        SWITCHTEC_GAS_PFF_CSR_OFFSET    = 0x134000,
 };
 
+enum switchtec_gen {
+       SWITCHTEC_GEN3,
+       SWITCHTEC_GEN4,
+};
+
 struct mrpc_regs {
        u8 input_data[SWITCHTEC_MRPC_PAYLOAD_SIZE];
        u8 output_data[SWITCHTEC_MRPC_PAYLOAD_SIZE];
@@ -98,16 +103,13 @@ struct sw_event_regs {
 } __packed;
 
 enum {
-       SWITCHTEC_CFG0_RUNNING = 0x04,
-       SWITCHTEC_CFG1_RUNNING = 0x05,
-       SWITCHTEC_IMG0_RUNNING = 0x03,
-       SWITCHTEC_IMG1_RUNNING = 0x07,
+       SWITCHTEC_GEN3_CFG0_RUNNING = 0x04,
+       SWITCHTEC_GEN3_CFG1_RUNNING = 0x05,
+       SWITCHTEC_GEN3_IMG0_RUNNING = 0x03,
+       SWITCHTEC_GEN3_IMG1_RUNNING = 0x07,
 };
 
-struct sys_info_regs {
-       u32 device_id;
-       u32 device_version;
-       u32 firmware_version;
+struct sys_info_regs_gen3 {
        u32 reserved1;
        u32 vendor_table_revision;
        u32 table_format_version;
@@ -124,26 +126,78 @@ struct sys_info_regs {
        u8 component_revision;
 } __packed;
 
-struct flash_info_regs {
+struct sys_info_regs_gen4 {
+       u16 gas_layout_ver;
+       u8 evlist_ver;
+       u8 reserved1;
+       u16 mgmt_cmd_set_ver;
+       u16 fabric_cmd_set_ver;
+       u32 reserved2[2];
+       u8 mrpc_uart_ver;
+       u8 mrpc_twi_ver;
+       u8 mrpc_eth_ver;
+       u8 mrpc_inband_ver;
+       u32 reserved3[7];
+       u32 fw_update_tmo;
+       u32 xml_version_cfg;
+       u32 xml_version_img;
+       u32 partition_id;
+       u16 bl2_running;
+       u16 cfg_running;
+       u16 img_running;
+       u16 key_running;
+       u32 reserved4[43];
+       u32 vendor_seeprom_twi;
+       u32 vendor_table_revision;
+       u32 vendor_specific_info[2];
+       u16 p2p_vendor_id;
+       u16 p2p_device_id;
+       u8 p2p_revision_id;
+       u8 reserved5[3];
+       u32 p2p_class_id;
+       u16 subsystem_vendor_id;
+       u16 subsystem_id;
+       u32 p2p_serial_number[2];
+       u8 mac_addr[6];
+       u8 reserved6[2];
+       u32 reserved7[3];
+       char vendor_id[8];
+       char product_id[24];
+       char  product_revision[2];
+       u16 reserved8;
+} __packed;
+
+struct sys_info_regs {
+       u32 device_id;
+       u32 device_version;
+       u32 firmware_version;
+       union {
+               struct sys_info_regs_gen3 gen3;
+               struct sys_info_regs_gen4 gen4;
+       };
+} __packed;
+
+struct partition_info {
+       u32 address;
+       u32 length;
+};
+
+struct flash_info_regs_gen3 {
        u32 flash_part_map_upd_idx;
 
-       struct active_partition_info {
+       struct active_partition_info_gen3 {
                u32 address;
                u32 build_version;
                u32 build_string;
        } active_img;
 
-       struct active_partition_info active_cfg;
-       struct active_partition_info inactive_img;
-       struct active_partition_info inactive_cfg;
+       struct active_partition_info_gen3 active_cfg;
+       struct active_partition_info_gen3 inactive_img;
+       struct active_partition_info_gen3 inactive_cfg;
 
        u32 flash_length;
 
-       struct partition_info {
-               u32 address;
-               u32 length;
-       } cfg0;
-
+       struct partition_info cfg0;
        struct partition_info cfg1;
        struct partition_info img0;
        struct partition_info img1;
@@ -151,6 +205,12 @@ struct flash_info_regs {
        struct partition_info vendor[8];
 };
 
+struct flash_info_regs {
+       union {
+               struct flash_info_regs_gen3 gen3;
+       };
+};
+
 enum {
        SWITCHTEC_NTB_REG_INFO_OFFSET   = 0x0000,
        SWITCHTEC_NTB_REG_CTRL_OFFSET   = 0x4000,
@@ -196,7 +256,9 @@ struct part_cfg_regs {
        u32 mrpc_comp_async_data[5];
        u32 dyn_binding_hdr;
        u32 dyn_binding_data[5];
-       u32 reserved4[159];
+       u32 intercomm_notify_hdr;
+       u32 intercomm_notify_data[5];
+       u32 reserved4[153];
 } __packed;
 
 enum {
@@ -320,7 +382,8 @@ struct pff_csr_regs {
        u32 dpc_data[5];
        u32 cts_hdr;
        u32 cts_data[5];
-       u32 reserved3[6];
+       u32 uec_hdr;
+       u32 uec_data[5];
        u32 hotplug_hdr;
        u32 hotplug_data[5];
        u32 ier_hdr;
@@ -355,6 +418,8 @@ struct switchtec_dev {
        struct device dev;
        struct cdev cdev;
 
+       enum switchtec_gen gen;
+
        int partition;
        int partition_count;
        int pff_csr_count;