]> asedeno.scripts.mit.edu Git - linux.git/commit
rsi: miscallaneous changes for 9116 and common
authorSiva Rebbagondla <siva8118@gmail.com>
Wed, 3 Apr 2019 04:13:09 +0000 (09:43 +0530)
committerKalle Valo <kvalo@codeaurora.org>
Thu, 25 Apr 2019 16:44:29 +0000 (19:44 +0300)
commit0a60014b76f512f18e48cfb4efc71e07c6791996
tree0de5a0bb801cefb7898edf2b5e3f463d92cf964d
parent17ff2c794f39f8c1bc7119e5fd9957efc69c3c72
rsi: miscallaneous changes for 9116 and common

Below changes are done:
* Device 80MHz clock should be disabled for 9116 in 20MHz band.
* Default edca parameters should be used initially before
  connection.
* Default TA aggregation is 3 for 9116.
* Bootup parameters should be loaded first when channel is
  changed.
* 4 byte register writes are possible for 9116.

Signed-off-by: Siva Rebbagondla <siva8118@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/rsi/rsi_91x_mgmt.c
drivers/net/wireless/rsi/rsi_91x_usb.c