]> asedeno.scripts.mit.edu Git - linux.git/commit
ARM: dts: imx6ul: Correct mask for GIC PPI interrupts
authorFabio Estevam <festevam@gmail.com>
Mon, 3 Dec 2018 17:40:19 +0000 (15:40 -0200)
committerShawn Guo <shawnguo@kernel.org>
Mon, 10 Dec 2018 02:03:04 +0000 (10:03 +0800)
commit0c29339d53bf7cf3b96847081ad7f64e835de4d4
treebc13d5cd7a3752feb26b0a5df1f6b37ae930aee0
parentf46af111c6948a842708d68d16564666ea2d1c68
ARM: dts: imx6ul: Correct mask for GIC PPI interrupts

The GIC_CPU_MASK_SIMPLE() macro should take as its argument the actual
number of CPU cores the interrupt controller is wired to.

i.MX6UL contains a single Cortex-A7, hence the second interrupt specifier
cell for Private Peripheral Interrupts should use "GIC_CPU_MASK_SIMPLE(1)".

Tested on a imx6ul-evk.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6ul.dtsi