]> asedeno.scripts.mit.edu Git - linux.git/commit
drm/i915/tgl: Finish modular FIA support on registers
authorJosé Roberto de Souza <jose.souza@intel.com>
Fri, 20 Sep 2019 20:58:06 +0000 (13:58 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Mon, 23 Sep 2019 17:38:12 +0000 (10:38 -0700)
commit31d9ae9d734226b2ce3a1bc2ce1ed29a6997d556
treea5993fd0ce63d76a72320396ec9c30f6f1fa4de4
parent6171e58b1ff5c41632d8fb87f0e6bd003ed34c13
drm/i915/tgl: Finish modular FIA support on registers

If platform supports and has modular FIA is enabled, the registers
bits also change, example: reading TC3 registers with modular FIA
enabled, driver should read from FIA2 but with TC1 bits offsets.

It is described in BSpec 50231 for DFLEXDPSP, other registers don't
have the BSpec description but testing in real hardware have proven
that it had moved for all other registers too.

v2:
- Caching index in tc_phy_fia_idx, instead of calculate it each time

v3:
- Setting tc_phy_fia and tc_phy_fia_idx in the same function

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190920205810.211048-3-jose.souza@intel.com
drivers/gpu/drm/i915/display/intel_display_types.h
drivers/gpu/drm/i915/display/intel_tc.c
drivers/gpu/drm/i915/i915_reg.h