]> asedeno.scripts.mit.edu Git - linux.git/commit
soc: renesas: Enable ARM_ERRATA_814220 for affected Cortex-A7
authorGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 19 Aug 2019 17:05:58 +0000 (19:05 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 23 Aug 2019 08:33:31 +0000 (10:33 +0200)
commit435dce2da218b0eb1ff758b77831562845394848
treec3f1f873acb2548f3cf12746447a635522b30a3d
parentaf0bc634728c0bc6a3f66f911f227d5c6396db88
soc: renesas: Enable ARM_ERRATA_814220 for affected Cortex-A7

ARM Erratum 814220 affects Cortex-A7 revisions r0p2-r0p5.

Automatically enable support code to mitigate the erratum when compiling
a kernel for any of the affected Renesas SoCs:
  - R-Mobile APE6: r0p2,
  - RZ/G1E: r0p5,
  - RZ/G1C: r0p5,
  - R-Car H2: r0p3,
  - R-Car E2: r0p5,
  - RZ/N1: r0p5.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
drivers/soc/renesas/Kconfig