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i2c: designware: Don't set SCL timings and speed mode when in slave mode
authorJarkko Nikula <jarkko.nikula@linux.intel.com>
Wed, 23 Aug 2017 13:46:12 +0000 (16:46 +0300)
committerWolfram Sang <wsa@the-dreams.de>
Mon, 27 Nov 2017 17:30:13 +0000 (18:30 +0100)
commit43df43e6ba139e6cd77ea31ca27efc67ea2df44b
tree75816aa58ad862e6ed2a75d2bff55b21d0afd8d4tree | snapshot
parent4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323commit | diff
i2c: designware: Don't set SCL timings and speed mode when in slave mode

According to data sheet SCL timing parameters and DW_IC_CON SPEED mode
bits are not used when operating in slave mode.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: Luis Oliveira <lolivei@synopsys.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
drivers/i2c/busses/i2c-designware-platdrv.c diff | blob | history
drivers/i2c/busses/i2c-designware-slave.c diff | blob | history
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