]> asedeno.scripts.mit.edu Git - linux.git/commit
drm/i915: Optimize VLV/CHV display FIFO updates
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 9 Mar 2017 15:44:34 +0000 (17:44 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 13 Mar 2017 19:15:10 +0000 (21:15 +0200)
commit44e921d4a19846e39fa818afa9d2d22c3117210a
tree54dd567690fcac683a0d8bdd8ee8aae080f57a89
parentdd584fc0711a28fb338bf66a623178e468c82272
drm/i915: Optimize VLV/CHV display FIFO updates

Use I915_{READ,WRITE}_FW() for updating the DSPARB registers on
VLV/CHV. This is less expesive as we can grab the uncore.lock across
the entire sequence of reads and writes instead of each register
access grabbing it.

This also allows us to eliminate the dsparb lock entirely as the
uncore.lock now effectively protects the contents of the DSPARB
registers.

v2: Add a note that interrupts are already disabled (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170309154434.29303-6-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/intel_pm.c