]> asedeno.scripts.mit.edu Git - linux.git/commit
drm/i915/dsb: Enable gamma lut programming using DSB.
authorAnimesh Manna <animesh.manna@intel.com>
Fri, 20 Sep 2019 11:59:28 +0000 (17:29 +0530)
committerJani Nikula <jani.nikula@intel.com>
Mon, 23 Sep 2019 07:21:10 +0000 (10:21 +0300)
commit49e3fb7fd880f294643304f3f374d553dd6a4c11
tree00d5fa8c8d3c851ac8603ca092c19853e895c95f
parent1abf329a713d2772257470873d57794d2404018d
drm/i915/dsb: Enable gamma lut programming using DSB.

Gamma lut programming can be programmed using DSB
where bulk register programming can be done using indexed
register write which takes number of data and the mmio offset
to be written.

Currently enabled for 12-bit gamma LUT which is enabled by
default and later 8-bit/10-bit will be enabled in future
based on need.

v1: Initial version.
v2: Directly call dsb-api at callsites. (Jani)
v3:
- modified the code as per single dsb instance per crtc. (Shashank)
- Added dsb get/put call in platform specific load_lut hook. (Jani)
- removed dsb pointer from dev_priv. (Jani)
v4: simplified code by dropping ref-count implementation. (Shashank)

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190920115930.27829-9-animesh.manna@intel.com
drivers/gpu/drm/i915/display/intel_color.c