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coresight: etm4x: Fix bit shifting
authorBo Yan <byan@nvidia.com>
Tue, 13 Mar 2018 17:24:31 +0000 (11:24 -0600)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 14 Mar 2018 17:05:34 +0000 (18:05 +0100)
commit57adbeea6451cedfeda257fe77749512894dff29
tree123331e207e9565f22f25024c921af5321f68f2dtree | snapshot
parent831c326fcd0e8e2a6ece952f898a1ec9b1dc1004commit | diff
coresight: etm4x: Fix bit shifting

ctxid_pid and vmid_val in config are of type u64. When an integer
0xFF is being left shifted more than 32 bits, the behavior is
undefined. The fix is to specify 0xFF as an unsigned long.

Detected by Coverity scan: CID 37650, 37651 (Bad bit shift operation)

Signed-off-by: Bo Yan <byan@nvidia.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/hwtracing/coresight/coresight-etm4x-sysfs.c diff | blob | history
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