]> asedeno.scripts.mit.edu Git - linux.git/commit
clk: rockchip: add 533.25MHz to rk3399 clock rates table
authorXing Zheng <zhengxing@rock-chips.com>
Fri, 21 Oct 2016 04:03:40 +0000 (12:03 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Fri, 21 Oct 2016 07:34:19 +0000 (09:34 +0200)
commit5c1c63f6345b9e1600875f3122166c0af434158e
tree80e6471ee2c5dfebca74bbb7d4f90624cc03de00
parent1001354ca34179f3db924eb66672442a173147dc
clk: rockchip: add 533.25MHz to rk3399 clock rates table

We need to get the accurate 533.25MHz for the DP display.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3399.c