]> asedeno.scripts.mit.edu Git - linux.git/commit
intel_idle: add BXT support
authorLen Brown <len.brown@intel.com>
Wed, 6 Apr 2016 21:00:47 +0000 (17:00 -0400)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Sat, 9 Apr 2016 00:17:43 +0000 (02:17 +0200)
commit5dcef694860100fd16885f052591b1268b764d21
tree7c083237a14697091466b2506f039e8d45363daa
parentc998c07836f985b24361629dc98506ec7893e7a0
intel_idle: add BXT support

Broxton has all the HSW C-states, except C3.
BXT C-state timing is slightly different.

Here we trust the IRTL MSRs as authority
on maximum C-state latency, and override the driver's tables
with the values found in the associated IRTL MSRs.
Further we set the target_residency to 1x maximum latency,
trusting the hardware demotion logic.

Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
arch/x86/include/asm/msr-index.h
drivers/idle/intel_idle.c