]> asedeno.scripts.mit.edu Git - linux.git/commit
drm/i915: Update pipe gamma enable bits when C8 planes are getting enabled/disabled
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 13 May 2019 13:39:03 +0000 (16:39 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 28 May 2019 17:46:55 +0000 (20:46 +0300)
commit638d87c4a70e497465cc489e03310de39efa0f82
treefab600630694a0ad8eea67664f4e7ad64cc0740e
parentc017cf6b1a5c7a218f7171bb8061132d9a23a918
drm/i915: Update pipe gamma enable bits when C8 planes are getting enabled/disabled

When the first C8 plane gets enabled, or the last one gets disabled we
may need to enable/disable the pipe gamma for the other active planes.
Check for that and run through the normal intel_color_check() path.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190513133904.20374-2-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
drivers/gpu/drm/i915/intel_display.c