]> asedeno.scripts.mit.edu Git - linux.git/commit
platform/x86: ISST: Add Intel Speed Select mailbox interface via MSRs
authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Wed, 26 Jun 2019 22:38:48 +0000 (15:38 -0700)
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tue, 2 Jul 2019 15:41:16 +0000 (18:41 +0300)
commit71b21bd7f68a6ee59003f63d2e4f84fd9b0a8d07
tree307f3254e76ca284c2247531fff8122d1e0535d0
parent31a166fe9c269af17977e650846ee4ea50361c07
platform/x86: ISST: Add Intel Speed Select mailbox interface via MSRs

Add an IOCTL to send mailbox commands to PUNIT using PUNIT MSRs for
mailbox. Some CPU models don't have PCI device, so need to use MSRs.
A limited set of mailbox commands can be sent to PUNIT.

This MMIO interface is used by the intel-speed-select tool under
tools/x86/power to enumerate and control Intel Speed Select features.
The MBOX commands ids and semantics of the message can be checked from
the source code of the tool.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
drivers/platform/x86/intel_speed_select_if/Makefile
drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c [new file with mode: 0644]