]> asedeno.scripts.mit.edu Git - linux.git/commit
pinctrl: msm: add support to configure ipq40xx GPIO_PULL bits
authorRam Chandra Jangir <rjangir@codeaurora.org>
Fri, 14 Jul 2017 14:14:11 +0000 (16:14 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 14 Aug 2017 13:00:59 +0000 (15:00 +0200)
commit83cf5faeba37fede8a6274d07f646d1cd1b25d35
tree68b623e08b6c518fbabf90ceff95beb7bcaa1d92
parent77a6595910df74d0554d7f16fe026ab0eb0b7a58
pinctrl: msm: add support to configure ipq40xx GPIO_PULL bits

GPIO_PULL bits configurations in TLMM_GPIO_CFG register
differs for IPQ40xx from rest of the other qcom SoCs.
As it does not support the keeper state and therefore can't
support bias-bus-hold property.

This patch adds a pull_no_keeper setting which configures the
msm_gpio_pull bits for ipq40xx. This is required to fix the
proper configurations of gpio-pull bits for nand pins mux.

IPQ40xx SoC:
2'b10: Internal pull up enable.
2'b11: Unsupport

For other SoC's:
2'b10: Keeper
2'b11: Pull-Up

Note: Due to pull_no_keeper length, all kerneldoc entries
in the msm_pinctrl_soc_data struct had to be realigned.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/qcom/pinctrl-ipq4019.c
drivers/pinctrl/qcom/pinctrl-msm.c
drivers/pinctrl/qcom/pinctrl-msm.h