]> asedeno.scripts.mit.edu Git - linux.git/commit
can: xilinx_can: xcan_rx_fifo_get_next_frame(): fix FSR register FL and RI mask value...
authorAppana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Mon, 12 Aug 2019 10:06:45 +0000 (15:36 +0530)
committerMarc Kleine-Budde <mkl@pengutronix.de>
Tue, 13 Aug 2019 15:32:19 +0000 (17:32 +0200)
commit9d06bcb9aa48dc4fc474dc8441a036bc4a090270
tree38e8f314cc66d0ed10f20de5bafb8ae67272c7ea
parente6997dd2688403bf8f760bd9fd7ddb5c654bc8bd
can: xilinx_can: xcan_rx_fifo_get_next_frame(): fix FSR register FL and RI mask values for canfd 2.0

For CANFD 2.0 IP configuration existing driver is using incorrect mask
values for FSR register FL and RI fields.

Fixes: c223da6 ("can: xilinx_can: Add support for CANFD FD frames")
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Acked-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
drivers/net/can/xilinx_can.c