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(parent: e3f019b) | patch
arm64; insn: Add encoder for the EXTR instruction
authorMarc Zyngier <marc.zyngier@arm.com>
Sun, 3 Dec 2017 17:47:03 +0000 (17:47 +0000)
committerMarc Zyngier <marc.zyngier@arm.com>
Mon, 19 Mar 2018 13:05:10 +0000 (13:05 +0000)
commit9f2efa320d395050abd0f39842843bb460736515
tree769cc9c3900c0a8ae5d8f49172bd6d9d06f86adetree | snapshot
parente3f019b37b580c3b954419212da26ac5db412a08commit | diff
arm64; insn: Add encoder for the EXTR instruction

Add an encoder for the EXTR instruction, which also implements the ROR
variant (where Rn == Rm).

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arch/arm64/include/asm/insn.h diff | blob | history
arch/arm64/kernel/insn.c diff | blob | history
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