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(parent: bf3240b) | patch
mmc: sdhci-cadence: Fix writing PHY delay
authorPiotr Sroka <piotrs@cadence.com>
Tue, 21 Mar 2017 14:32:16 +0000 (14:32 +0000)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 24 Apr 2017 19:41:54 +0000 (21:41 +0200)
commita0f8243229ed071c8da0ea7cedc1b7bf1b1515da
treec0343ab3d0ebdc2b41a87326179a6a7d5f7756ectree | snapshot
parentbf3240bada0211b4a555d75f027181c8432b2d20commit | diff
mmc: sdhci-cadence: Fix writing PHY delay

Add polling for ACK to be sure that data are written to PHY register.

Signed-off-by: Piotr Sroka <piotrs@cadence.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-cadence.c diff | blob | history
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