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(parent: 2ea659a) | patch
PCI: Cache PRI and PASID bits in pci_dev
authorJean-Philippe Brucker <jean-philippe.brucker@arm.com>
Tue, 30 May 2017 16:25:48 +0000 (09:25 -0700)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 30 May 2017 20:39:15 +0000 (15:39 -0500)
commita4f4fa681add289ebfec6d776376ad7a2ffda669
treebad540deacc055ab92790af76e4e20f9107729a0tree | snapshot
parent2ea659a9ef488125eb46da6eb571de5eae5c43f6commit | diff
PCI: Cache PRI and PASID bits in pci_dev

Device drivers need to check if an IOMMU enabled ATS, PRI and PASID in
order to know when they can use the SVM API.  Cache PRI and PASID bits in
the pci_dev structure, similarly to what is currently done for ATS.

Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
drivers/pci/ats.c diff | blob | history
include/linux/pci.h diff | blob | history
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