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(parent: 534db19) | patch
drm/amd/display: refactor clk_resync to avoid assertion
authorTony Cheng <tony.cheng@amd.com>
Tue, 17 Jan 2017 01:37:08 +0000 (20:37 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2017 21:10:52 +0000 (17:10 -0400)
commitab7044d0d17a8226a8b51e235e16204e696ae42a
treeb2bc3823dc30f039e310ba5bed9ee64bcc4fa847tree | snapshot
parent534db198866070fdb655423637afdce6cf0c05dbcommit | diff
drm/amd/display: refactor clk_resync to avoid assertion

- not all DCE has PHYPLLA_PIXCLK_DOUBLE_RATE_ENABLE bit defined.

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c diff | blob | history
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