]> asedeno.scripts.mit.edu Git - linux.git/commit
clk: renesas: rcar-gen3: Correct parent clock of HS-USB
authorKazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Wed, 25 Jul 2018 09:07:05 +0000 (18:07 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 2 Apr 2019 08:08:27 +0000 (10:08 +0200)
commitc2182095c850a02e150613ac026be99ce1c2ff9f
tree4ca95281db9a8d23ac095e49a6d888fbcad08d80
parent8d36fdcce21c1713eacf45380696f8cec3d724bf
clk: renesas: rcar-gen3: Correct parent clock of HS-USB

According to the R-Car Gen3 Hardware Manual Rev. 1.00, and the RZ/G2
Hardware Manual Rev. 0.61, the parent clock of the HS-USB module
clocks on R-Car Gen3 and RZ/G2 SoCs is S3D2.

Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
[takeshi: Update R-Car H3, M3-N, and E3]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Update RZ/G2M and RZ/G2E]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
drivers/clk/renesas/r8a774a1-cpg-mssr.c
drivers/clk/renesas/r8a774c0-cpg-mssr.c
drivers/clk/renesas/r8a7795-cpg-mssr.c
drivers/clk/renesas/r8a7796-cpg-mssr.c
drivers/clk/renesas/r8a77965-cpg-mssr.c
drivers/clk/renesas/r8a77990-cpg-mssr.c