]> asedeno.scripts.mit.edu Git - linux.git/commit
clk: tegra: pll: Add specialized logic for Tegra210
authorRhyland Klein <rklein@nvidia.com>
Thu, 18 Jun 2015 21:28:28 +0000 (17:28 -0400)
committerThierry Reding <treding@nvidia.com>
Thu, 17 Dec 2015 12:37:52 +0000 (13:37 +0100)
commitdd322f047d226a1134775c77c1c6088271d5d1de
tree718ad72c14eca6d5ef916042cdcd2509cf356e38
parent267b62a969511236e91121cd27f4cc1558385855
clk: tegra: pll: Add specialized logic for Tegra210

On Tegra210 SoC's, the logic to enable several of the plls is different
from previous generations. Therefore, add registration functions specific
to Tegra210 which will handle them appropriately.

Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-pll.c
drivers/clk/tegra/clk.h