]> asedeno.scripts.mit.edu Git - linux.git/commit
rtc: tegra: set range
authorAlexandre Belloni <alexandre.belloni@bootlin.com>
Sun, 7 Apr 2019 21:16:44 +0000 (23:16 +0200)
committerAlexandre Belloni <alexandre.belloni@bootlin.com>
Mon, 8 Apr 2019 13:05:19 +0000 (15:05 +0200)
commite1089802467dcfc76c0cf39910200b418faa4d72
tree33a9058fe0c7f7876d59fc01e64766b3c9d6e308
parent7d624621b704d3cfd0c6735956f5d96b24508165
rtc: tegra: set range

The Tegra 20 RTC is a 32bit seconds counter (with an unused millisecond
counter).

Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
drivers/rtc/rtc-tegra.c