]> asedeno.scripts.mit.edu Git - linux.git/commit
net: stmmac: dwmac-meson: extend phy mode setting
authorYixun Lan <yixun.lan@amlogic.com>
Sat, 28 Apr 2018 10:21:11 +0000 (10:21 +0000)
committerDavid S. Miller <davem@davemloft.net>
Tue, 1 May 2018 15:29:59 +0000 (11:29 -0400)
commitefacb568c962470894dcda2bc51ea42af96a39eb
treea145f3b0015a7bd64780a21dde916e4ab8ff8176
parent7e5d05e18ba1ed491c6f836edee7f0b90f3167bc
net: stmmac: dwmac-meson: extend phy mode setting

In the Meson-AXG SoC, the phy mode setting of PRG_ETH0 in the glue layer
is extended from bit[0] to bit[2:0].
  There is no problem if we configure it to the RGMII 1000M PHY mode,
since the register setting is coincidentally compatible with previous one,
but for the RMII 100M PHY mode, the configuration need to be changed to
value - b100.
  This patch was verified with a RTL8201F 100M ethernet PHY.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c