]> asedeno.scripts.mit.edu Git - linux.git/commit
phy: sun4i-usb: Support secondary clock for HSIC PHY
authorChen-Yu Tsai <wens@csie.org>
Thu, 3 Aug 2017 08:14:06 +0000 (16:14 +0800)
committerKishon Vijay Abraham I <kishon@ti.com>
Tue, 22 Aug 2017 04:41:17 +0000 (10:11 +0530)
commitf0152c58c68f94f86bee8d91c4e4835e0c43ada7
tree3ae9fd7bc83fe1f50ad2797682bc00b7c0b863fd
parent1af556464495006472aa0c023bee088d053112d5
phy: sun4i-usb: Support secondary clock for HSIC PHY

On the Allwinner A83T SoC, the last USB PHY is an HSIC PHY. It requires
two clocks instead of one.

On all Allwinner SoCs that share the common USB PHY design supported by
the phy-sun4i-usb driver, the first PHY is always tied to OTG, and there
is at most one HSIC PHY, typically the last.

In this patch we take advantage of these known constraints and store an
index in the compatible-string-related config structure describing which
PHY is HSIC, needing the extra hsic_12M clock.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
drivers/phy/allwinner/phy-sun4i-usb.c